From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Thu, 1 Apr 2021 16:35:18 +0000 (+0000)
Subject: run doChipFloorplan in experiments10
X-Git-Tag: LS180_RC3~161
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b6c76683f872db283418ce05f68d841a5df14f65;p=soclayout.git

run doChipFloorplan in experiments10
---

diff --git a/experiments10/doDesign.py b/experiments10/doDesign.py
index 21d45b0..4aa1e5f 100644
--- a/experiments10/doDesign.py
+++ b/experiments10/doDesign.py
@@ -82,6 +82,7 @@ def scriptMain ( **kw ):
         adderToChip = CoreToChip( adderConf )
         adderToChip.buildChip()
         chipBuilder = Chip( adderConf )
+        chipBuilder.doChipFloorplan()
         rvalue = chipBuilder.doPnR()
         chipBuilder.save()
     except Exception, e: