From: Rob Clark <robdclark@chromium.org>
Date: Fri, 28 Feb 2020 20:47:29 +0000 (-0800)
Subject: freedreno/ir3: split out has_latency_to_hide()
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b6eb11295a7fab543d738263798b96883e3a658b;p=mesa.git

freedreno/ir3: split out has_latency_to_hide()

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4071>
---

diff --git a/src/freedreno/ir3/ir3.h b/src/freedreno/ir3/ir3.h
index 1a3edbc4530..a44663f4238 100644
--- a/src/freedreno/ir3/ir3.h
+++ b/src/freedreno/ir3/ir3.h
@@ -1198,6 +1198,30 @@ int ir3_ra(struct ir3_shader_variant *v, struct ir3_instruction **precolor, unsi
 /* legalize: */
 void ir3_legalize(struct ir3 *ir, struct ir3_shader_variant *so, int *max_bary);
 
+static inline bool
+ir3_has_latency_to_hide(struct ir3 *ir)
+{
+	foreach_block (block, &ir->block_list) {
+		foreach_instr (instr, &block->instr_list) {
+			if (is_tex(instr))
+				return true;
+
+			if (is_load(instr)) {
+				switch (instr->opc) {
+				case OPC_LDLV:
+				case OPC_LDL:
+				case OPC_LDLW:
+					break;
+				default:
+					return true;
+				}
+			}
+		}
+	}
+
+	return false;
+}
+
 /* ************************************************************************* */
 /* instruction helpers */
 
diff --git a/src/freedreno/ir3/ir3_sched.c b/src/freedreno/ir3/ir3_sched.c
index 9c8d3572a23..d48fd497b74 100644
--- a/src/freedreno/ir3/ir3_sched.c
+++ b/src/freedreno/ir3/ir3_sched.c
@@ -772,34 +772,10 @@ sched_block(struct ir3_sched_ctx *ctx, struct ir3_block *block)
 	}
 }
 
-static bool
-has_latency_to_hide(struct ir3 *ir)
-{
-	foreach_block (block, &ir->block_list) {
-		foreach_instr (instr, &block->instr_list) {
-			if (is_tex(instr))
-				return true;
-
-			if (is_load(instr)) {
-				switch (instr->opc) {
-				case OPC_LDLV:
-				case OPC_LDL:
-				case OPC_LDLW:
-					break;
-				default:
-					return true;
-				}
-			}
-		}
-	}
-
-	return false;
-}
-
 static void
 setup_thresholds(struct ir3_sched_ctx *ctx, struct ir3 *ir)
 {
-	if (has_latency_to_hide(ir)) {
+	if (ir3_has_latency_to_hide(ir)) {
 		ctx->live_threshold_hi = 2 * 16 * 4;
 		ctx->live_threshold_lo = 2 * 4 * 4;
 		ctx->depth_threshold_hi = 6;