From: lkcl Date: Thu, 23 Jun 2022 11:38:05 +0000 (+0100) Subject: (no commit message) X-Git-Tag: opf_rfc_ls005_v1~1578 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b6fb0e75f91a95e24180134f406800f978f12b2f;p=libreriscv.git --- diff --git a/openpower/sv/mv.vec.mdwn b/openpower/sv/mv.vec.mdwn index fd24fb13c..a95b9ba1e 100644 --- a/openpower/sv/mv.vec.mdwn +++ b/openpower/sv/mv.vec.mdwn @@ -75,15 +75,8 @@ room within the reserved bits of `svremap` as well. Also used on [[sv/mv.swizzle]] -MVRM-2P-1S1D: - -| Field Name | Field bits | Description | -|------------|------------|----------------------------| -| Rdest_EXTRA2 | `10:11` | extends Rdest (R\*\_EXTRA2 Encoding) | -| Rsrc_EXTRA2 | `12:13` | extends Rsrc (R\*\_EXTRA2 Encoding) | -| PACK_en | `14` | Enable pack | -| UNPACK_en | `15` | Enable unpack | -| MASK_SRC | `16:18` | Execution Mask for Source | +`RM-2P-1S1D-PU` Mode is applicable to all mv operations +(fmv etc) and to Indexed LD/ST. The usual RM-2P-1S1D is reduced from EXTRA3 to EXTRA2, making room for 2 extra bits that enable either "packing" or "unpacking"