From: Clifford Wolf <clifford@clifford.at>
Date: Mon, 26 Feb 2018 14:26:01 +0000 (+0100)
Subject: Add handling of verific OPER_REDUCE_NOR
X-Git-Tag: yosys-0.8~200
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b6fbeb0969773770af79fe4bd8f5b15c863ef90b;p=yosys.git

Add handling of verific OPER_REDUCE_NOR

Signed-off-by: Clifford Wolf <clifford@clifford.at>
---

diff --git a/frontends/verific/verific.cc b/frontends/verific/verific.cc
index 1a16f7508..e85e6cf71 100644
--- a/frontends/verific/verific.cc
+++ b/frontends/verific/verific.cc
@@ -478,6 +478,12 @@ bool VerificImporter::import_netlist_instance_cells(Instance *inst, RTLIL::IdStr
 		return true;
 	}
 
+	if (inst->Type() == OPER_REDUCE_NOR) {
+		SigSpec t = module->ReduceOr(NEW_ID, IN, SIGNED);
+		module->addNot(inst_name, t, net_map_at(inst->GetOutput()));
+		return true;
+	}
+
 	if (inst->Type() == OPER_LESSTHAN) {
 		Net *net_cin = inst->GetCin();
 		if (net_cin->IsGnd())