From: Eddie Hung <eddie@fpgeh.com>
Date: Mon, 19 Aug 2019 19:46:35 +0000 (-0700)
Subject: Add BRAM arrival times
X-Git-Tag: working-ls180~881^2^2~237
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b71212ddeaf099fbbf78d65cf64b3f6f75f80aea;p=yosys.git

Add BRAM arrival times
---

diff --git a/techlibs/xilinx/xc7_brams_bb.v b/techlibs/xilinx/xc7_brams_bb.v
index a682ba4a7..0e8cb406c 100644
--- a/techlibs/xilinx/xc7_brams_bb.v
+++ b/techlibs/xilinx/xc7_brams_bb.v
@@ -1,3 +1,5 @@
+// Max delays from https://github.com/SymbiFlow/prjxray-db/blob/f8e0364116b2983ac72a3dc8c509ea1cc79e2e3d/artix7/timings/BRAM_L.sdf#L138-L147
+
 module RAMB18E1 (
 	input CLKARDCLK,
 	input CLKBWRCLK,
@@ -19,10 +21,10 @@ module RAMB18E1 (
 	input [1:0] WEA,
 	input [3:0] WEBWE,
 
-	output [15:0] DOADO,
-	output [15:0] DOBDO,
-	output [1:0] DOPADOP,
-	output [1:0] DOPBDOP
+	(* abc_arrival=2454 *) output [15:0] DOADO,
+	(* abc_arrival=2454 *) output [15:0] DOBDO,
+	(* abc_arrival=2454 *) output [1:0] DOPADOP,
+	(* abc_arrival=2454 *) output [1:0] DOPBDOP
 );
 	parameter INITP_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
 	parameter INITP_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
@@ -143,10 +145,10 @@ module RAMB36E1 (
 	input [3:0] WEA,
 	input [7:0] WEBWE,
 
-	output [31:0] DOADO,
-	output [31:0] DOBDO,
-	output [3:0] DOPADOP,
-	output [3:0] DOPBDOP
+	(* abc_arrival=2454 *) output [31:0] DOADO,
+	(* abc_arrival=2454 *) output [31:0] DOBDO,
+	(* abc_arrival=2454 *) output [3:0] DOPADOP,
+	(* abc_arrival=2454 *) output [3:0] DOPBDOP
 );
 	parameter INITP_00 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
 	parameter INITP_01 = 256'h0000000000000000000000000000000000000000000000000000000000000000;