From: Clifford Wolf Date: Fri, 18 Sep 2015 08:46:50 +0000 (+0200) Subject: Added $logic_not handling to fsm_detect X-Git-Tag: yosys-0.6~161 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b7535a6c750108697161a72b5f2fe0001d0dd375;p=yosys.git Added $logic_not handling to fsm_detect --- diff --git a/passes/fsm/fsm_detect.cc b/passes/fsm/fsm_detect.cc index feeaa347c..fd0ae44b9 100644 --- a/passes/fsm/fsm_detect.cc +++ b/passes/fsm/fsm_detect.cc @@ -89,6 +89,8 @@ static bool check_state_users(RTLIL::SigSpec sig) RTLIL::Cell *cell = cellport.first; if (muxtree_cells.count(cell) > 0) continue; + if (cell->type == "$logic_not" && assign_map(cell->getPort("\\A")) == sig) + continue; if (cellport.second != "\\A" && cellport.second != "\\B") return false; if (!cell->hasPort("\\A") || !cell->hasPort("\\B") || !cell->hasPort("\\Y"))