From: lkcl <lkcl@web>
Date: Sat, 24 Sep 2022 23:15:49 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~307
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b7a35e2be1ac44657bff4c72b8f9db9195c1ee56;p=libreriscv.git

---

diff --git a/openpower/sv/overview/discussion.mdwn b/openpower/sv/overview/discussion.mdwn
index a430af00a..b998e1c85 100644
--- a/openpower/sv/overview/discussion.mdwn
+++ b/openpower/sv/overview/discussion.mdwn
@@ -210,5 +210,5 @@ First we define the contents of 64-bit registers:
 
 | name | hi      byte/bit        | ... | lo byte/bit                     |
 |------|-------------------------|-----|---------------------------------|
-| bits | b0 b1 b2 b3 b4 b5 b6 b7 | ... | b56 b57 b58 b59 b60 b61 b62 b63 |
+| bits | b0.b1.b2.b3.b4.b5.b6.b7 | ... | b56.b57.b58.b59.b60.b61.b62.b63 |
 | bytes|        B0               | ... |  B7                             |