From: Jim Wilson Date: Thu, 13 Dec 2018 18:48:23 +0000 (-0800) Subject: RISC-V: Correct printing of MSTATUS and MISA. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b7c8601a7f2874de1bbe0dc38ef86ea053593ad8;p=binutils-gdb.git RISC-V: Correct printing of MSTATUS and MISA. * riscv-tdep.c (riscv_print_one_register_info): For MSTATUS, add comment for SD field, and correct xlen calculation. For MISA, add comment for MXL field, add call to register_size, and correct base calculation. --- diff --git a/gdb/ChangeLog b/gdb/ChangeLog index 45991576fc4..bf40e682a92 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,3 +1,10 @@ +2018-12-13 Jim Wilson + + * riscv-tdep.c (riscv_print_one_register_info): For MSTATUS, add + comment for SD field, and correct xlen calculation. For MISA, add + comment for MXL field, add call to register_size, and correct base + calculation. + 2018-12-13 Stafford Horne * NEWS(New targets): Add or1k*-*-linux*. diff --git a/gdb/riscv-tdep.c b/gdb/riscv-tdep.c index fc424fb042c..88b79af866f 100644 --- a/gdb/riscv-tdep.c +++ b/gdb/riscv-tdep.c @@ -701,8 +701,10 @@ riscv_print_one_register_info (struct gdbarch *gdbarch, int size = register_size (gdbarch, regnum); unsigned xlen; + /* The SD field is always in the upper bit of MSTATUS, regardless + of the number of bits in MSTATUS. */ d = value_as_long (val); - xlen = size * 4; + xlen = size * 8; fprintf_filtered (file, "\tSD:%X VM:%02X MXR:%X PUM:%X MPRV:%X XS:%X " "FS:%X MPP:%x HPP:%X SPP:%X MPIE:%X HPIE:%X " @@ -731,9 +733,13 @@ riscv_print_one_register_info (struct gdbarch *gdbarch, int base; unsigned xlen, i; LONGEST d; + int size = register_size (gdbarch, regnum); + /* The MXL field is always in the upper two bits of MISA, + regardless of the number of bits in MISA. Mask out other + bits to ensure we have a positive value. */ d = value_as_long (val); - base = d >> 30; + base = (d >> ((size * 8) - 2)) & 0x3; xlen = 16; for (; base > 0; base--)