From: Florent Kermarrec <florent@enjoy-digital.fr>
Date: Fri, 10 Jul 2020 08:42:00 +0000 (+0200)
Subject: core/cpu/CPUNone: set endianness to little.
X-Git-Tag: 24jan2021_ls180~89
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b7e4507686ee464966d307e1c9f552dd9a08b5a5;p=litex.git

core/cpu/CPUNone: set endianness to little.
---

diff --git a/litex/soc/cores/cpu/__init__.py b/litex/soc/cores/cpu/__init__.py
index 47f4519f..ebb36086 100644
--- a/litex/soc/cores/cpu/__init__.py
+++ b/litex/soc/cores/cpu/__init__.py
@@ -26,6 +26,7 @@ class CPU(Module):
 class CPUNone(CPU):
     variants             = ["standard"]
     data_width           = 32
+    endianness           = "little"
     reset_address        = 0x00000000
     io_regions           = {0x00000000: 0x100000000} # origin, length
     periph_buses         = []