From: Tim Rowley Date: Wed, 7 Jun 2017 18:16:15 +0000 (-0500) Subject: swr/rast: Share vertex memory between VS input/output X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b7eb86c617ee8f73b552dc64a6d776d26672c38f;p=mesa.git swr/rast: Share vertex memory between VS input/output Removes large simdvertex stack allocation. Vertex shader must ensure reads happen before writes. Reviewed-by: Bruce Cherniak --- diff --git a/src/gallium/drivers/swr/rasterizer/core/frontend.cpp b/src/gallium/drivers/swr/rasterizer/core/frontend.cpp index 157a3180092..902253b1481 100644 --- a/src/gallium/drivers/swr/rasterizer/core/frontend.cpp +++ b/src/gallium/drivers/swr/rasterizer/core/frontend.cpp @@ -1727,11 +1727,7 @@ void ProcessDraw( } #else - simdvertex vin; SWR_VS_CONTEXT vsContext; - - vsContext.pVin = &vin; - SWR_FETCH_CONTEXT fetchInfo = { 0 }; fetchInfo.pStreams = &state.vertexBuffers[0]; @@ -1787,6 +1783,7 @@ void ProcessDraw( } simdvertex& vout = pa.GetNextVsOutput(); + vsContext.pVin = &vout; vsContext.pVout = &vout; if (i < endVertex) @@ -1794,7 +1791,7 @@ void ProcessDraw( // 1. Execute FS/VS for a single SIMD. AR_BEGIN(FEFetchShader, pDC->drawId); - state.pfnFetchFunc(fetchInfo, vin); + state.pfnFetchFunc(fetchInfo, vout); AR_END(FEFetchShader, 0); // forward fetch generated vertex IDs to the vertex shader