From: Sergey Shalnov <Sergey.Shalnov@intel.com>
Date: Fri, 1 Dec 2017 05:59:33 +0000 (+0000)
Subject: Fix registers type for MODE_TI
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b7f47ecdde00d836765f15c0c5dbec927e8933c9;p=gcc.git

Fix registers type for MODE_TI

gcc/
	* config/i386/i386.c (standard_sse_constant_opcode): Fix
	registers type for 128bit mode.

From-SVN: r255290
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 6a42a25a24e..bfa6016f5cc 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2017-12-01  Sergey Shalnov  <Sergey.Shalnov@intel.com>
+
+	* config/i386/i386.c (standard_sse_constant_opcode): Fix
+	registers type for 128bit mode.
+
 2017-11-30  Jakub Jelinek  <jakub@redhat.com>
 
 	* spellcheck-tree.c (test_find_closest_identifier): Use ; instead
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 30c5ab36210..2f4ca7c01e9 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -10403,7 +10403,7 @@ standard_sse_constant_opcode (rtx_insn *insn, rtx x)
 		  : "vpxor\t%x0, %x0, %x0");
 	case MODE_TI:
 	  return (TARGET_AVX512VL
-		  ? "vpxord\t%t0, %t0, %t0"
+		  ? "vpxord\t%x0, %x0, %x0"
 		  : "%vpxor\t%0, %d0");
 
 	case MODE_V8DF: