From: Florent Kermarrec Date: Mon, 22 Apr 2019 06:41:28 +0000 (+0200) Subject: test: remove waveforms generation X-Git-Tag: 24jan2021_ls180~1309 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b7f53fb93c5684485cbc0a152ca26bdbf67ed6a7;p=litex.git test: remove waveforms generation --- diff --git a/test/test_axi_lite.py b/test/test_axi_lite.py index c350e648..6380e3e3 100644 --- a/test/test_axi_lite.py +++ b/test/test_axi_lite.py @@ -70,7 +70,7 @@ class TestAXILite(unittest.TestCase): for _ in range(8): yield dut = AXILiteDUT() - run_simulation(dut, generator(dut.dut), vcd_name='axi-write-read.vcd') + run_simulation(dut, generator(dut.dut)) def test_simultaneous(dut): def generator(dut): @@ -101,4 +101,4 @@ class TestAXILite(unittest.TestCase): dut = AXILiteDUT() - run_simulation(dut, generator(dut.dut), vcd_name='axi-simultaneous.vcd') + run_simulation(dut, generator(dut.dut)) diff --git a/test/test_gearbox.py b/test/test_gearbox.py index cf444d0b..7bb748cf 100644 --- a/test/test_gearbox.py +++ b/test/test_gearbox.py @@ -51,5 +51,5 @@ class TestGearbox(unittest.TestCase): data_generator(dut, dut.gearbox0, datas), data_checker(dut, dut.gearbox1, datas) ] - run_simulation(dut, generators, vcd_name="sim.vcd") + run_simulation(dut, generators) self.assertEqual(dut.errors, 0)