From: Gabe Black Date: Mon, 5 Mar 2007 14:49:07 +0000 (+0000) Subject: Various touch ups X-Git-Tag: m5_2.0_beta3~161 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b832e6740f32f9f0508f11dab93d7a8296e76854;p=gem5.git Various touch ups --HG-- extra : convert_revision : 19ff30d969a46adbd256f674582a9e7d398b56ed --- diff --git a/src/arch/x86/isa_traits.hh b/src/arch/x86/isa_traits.hh index fcff50b70..d5da8b420 100644 --- a/src/arch/x86/isa_traits.hh +++ b/src/arch/x86/isa_traits.hh @@ -58,8 +58,11 @@ #ifndef __ARCH_X86_ISATRAITS_HH__ #define __ARCH_X86_ISATRAITS_HH__ +#include "arch/x86/types.hh" #include "arch/x86/x86_traits.hh" +class StaticInstPtr; + namespace LittleEndianGuest {} namespace X86ISA @@ -111,10 +114,15 @@ namespace X86ISA const int MaxInstDestRegs = 10; //4k. This value is not constant on x86. - const int LogVmPageSize = 12; - const int VMPageSize = (1 << LogVmPageSize); + const int LogVMPageSize = 12; + const int VMPageSize = (1 << LogVMPageSize); + + const int PageShift = 13; + const int PageBytes = 1ULL << PageShift; const int BranchPredAddrShiftAmt = 0; + + StaticInstPtr decodeInst(ExtMachInst); }; #endif // __ARCH_X86_ISATRAITS_HH__