From: Miodrag Milanovic Date: Mon, 25 Oct 2021 07:04:43 +0000 (+0200) Subject: Compile option for enabling async load verific support X-Git-Tag: yosys-0.11~28 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b8624ad2aef941776f5b4a08f66f8d43e70f8467;p=yosys.git Compile option for enabling async load verific support --- diff --git a/Makefile b/Makefile index 951587aa3..9d806f438 100644 --- a/Makefile +++ b/Makefile @@ -20,6 +20,7 @@ ENABLE_GHDL := 0 ENABLE_VERIFIC := 0 DISABLE_VERIFIC_EXTENSIONS := 0 DISABLE_VERIFIC_VHDL := 0 +ENABLE_VERIFIC_ASYNC_LOAD := 0 ENABLE_COVER := 1 ENABLE_LIBYOSYS := 0 ENABLE_PROTOBUF := 0 @@ -501,6 +502,9 @@ endif ifeq ($(ENABLE_VERIFIC),1) VERIFIC_DIR ?= /usr/local/src/verific_lib VERIFIC_COMPONENTS ?= verilog database util containers hier_tree +ifeq ($(ENABLE_VERIFIC_ASYNC_LOAD),1) +CXXFLAGS += -DVERIFIC_ASYNC_LOAD +endif ifneq ($(DISABLE_VERIFIC_VHDL),1) VERIFIC_COMPONENTS += vhdl CXXFLAGS += -DVERIFIC_VHDL_SUPPORT diff --git a/frontends/verific/verific.cc b/frontends/verific/verific.cc index 18fba9b76..47ddbc662 100644 --- a/frontends/verific/verific.cc +++ b/frontends/verific/verific.cc @@ -2474,8 +2474,11 @@ struct VerificPass : public Pass { RuntimeFlags::SetVar("db_preserve_user_nets", 1); RuntimeFlags::SetVar("db_allow_external_nets", 1); RuntimeFlags::SetVar("db_infer_wide_operators", 1); +#ifdef VERIFIC_ASYNC_LOAD + RuntimeFlags::SetVar("db_infer_set_reset_registers", 0); +#else RuntimeFlags::SetVar("db_infer_set_reset_registers", 1); - +#endif RuntimeFlags::SetVar("veri_extract_dualport_rams", 0); RuntimeFlags::SetVar("veri_extract_multiport_rams", 1);