From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sun, 28 Jan 2024 20:42:50 +0000 (+0000)
Subject: add BA_BFB decode to PPCRecord and SVP64Record
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b86bfbb41afaf3983f819b4ae1d9f3cd4e791d1f;p=openpower-isa.git

add BA_BFB decode to PPCRecord and SVP64Record
---

diff --git a/src/openpower/insndb/core.py b/src/openpower/insndb/core.py
index 4a7f4feb..8a398c9f 100644
--- a/src/openpower/insndb/core.py
+++ b/src/openpower/insndb/core.py
@@ -288,6 +288,11 @@ class PPCRecord(Dataclass):
             record["cr_in2"] = "BB"
             del record["CR in"]
 
+        if record["CR in"] == "BA_BFB":
+            record["cr_in"] = "BA"
+            record["cr_in2"] = "BFB"
+            del record["CR in"]
+
         flags = set()
         for flag in frozenset(PPCRecord.Flags):
             if bool(record.pop(flag, "")):
@@ -396,6 +401,10 @@ class SVP64Record(Dataclass):
             record["cr_in2"] = "BFB"
             #record["cr_out"] = "BF" # only use BFA_BFB_BF when BF is a dest
             del record["CR in"]
+        if record["CR in"] == "BA_BFB": # maaamma miiiia... enough!
+            record["cr_in"] = "BA"
+            record["cr_in2"] = "BFB"
+            del record["CR in"]
 
         extra = []
         for idx in range(0, 4):
@@ -463,6 +472,14 @@ class SVP64Record(Dataclass):
                 regs[key] = _Reg(sels[key])
                 seltype[key] = _SelType.SRC
 
+        if sels["cr_in"] is _CRInSel.BA_BFB:
+            sels["cr_in"] = _CRIn2Sel.BA
+            sels["cr_in2"] = _CRIn2Sel.BFB
+            idxs["cr_in2"] = idxs["cr_in"]
+            for key in ("cr_in", "cr_in2"):
+                regs[key] = _Reg(sels[key])
+                seltype[key] = _SelType.SRC
+
         # should only be used when BF is also a destination
         if sels["cr_in"] is _CRInSel.BFA_BFB_BF:
             sels["cr_in"] = _CRIn2Sel.BFA