From: lkcl Date: Fri, 2 Sep 2022 20:30:48 +0000 (+0100) Subject: (no commit message) X-Git-Tag: opf_rfc_ls005_v1~725 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b8bd867de1626ebcc0dfbff0c9f610ca8499fbe8;p=libreriscv.git --- diff --git a/about_us.mdwn b/about_us.mdwn index 40188f8f8..332aa6b50 100644 --- a/about_us.mdwn +++ b/about_us.mdwn @@ -138,6 +138,46 @@ Alain's website: * FW experience: system programming * Availability: depends on a week (0..10+hrs/week) +## [[Kyle Lehman|klehman]] + +* Languages: C/C++, Java, Python, SQL, assembly +* Interests: Language design, microacrhitecture, OS design, emulation, 3D computation +* Other interests: Nearly anything that floats, flies, or has an engine with wheels + +## [[Andrey Miroshnikov|andreym]] +* Languages: C, Python, Verilog, Shell script +* Interests: Analogue/digital electronics, RF, mobile comms, compilers, FPGAs, discrete mathematics, microarchitecture, Unix OSs, PCB design +* Experience: FPGA/ASIC system validation, instrument automation using VISA, PCB design (KiCAD, Altium) +* Other interests: King James Bible, Russian Synodal Bible, Languages, Philosophy, History +* Availability: Full-time +* IRC: octavius + +## [[Manikandan Nagarajan|Manik]] + +* Languages: Verilog HDL, VHDL, C, Python & TCL +* Experience : Domain Specific Architecture Design and Implementation, IP Core Development, System on Chip, FPGA System Design, Chip Tapeout, Crypto Chip Design, Authentication Protocol Design. +* LinkedIn Profile: [[https://www.linkedin.com/in/manikandan-nagarajan-2156171a0/]] +* Availability: 8~10hrs/week + +## [[Toshaan Bharvani|toshywoshy]] +* Languages: C, C++, Golang, Python, Ruby, Assembly, Java, Javascript, bash, ksh, ... +* Interests: Software on optimized hardware, compilers, FPGAs, microarchitecture, Unix OSs, Linux, Enterprise Software +* Experience: Software, Firmware, BIOS/UEFI, Microcode, Services +* Other interests: History, Mechanics, Tinkering +* Availability: Full-time +* IRC: toshywoshy + +## [[Sadoon Albader|sadoon]] +* Computer engineer specializing in hardware design +* Home system administrator +* Knowledge in Debian, Gentoo, and Arch +* Languages: C, VHDL, SystemVerilog +* Built my own (now unmaintained) powerpc and ppc64 ports for Debian 11, looking to build a clean slate +* Experience: Intel FPGA design, HDL optimization, Software to HDL conversion (SPP), Microprocessor Architecture +* Other Interests: Religion, History, Automobiles +* Website: [[https://soulserv.xyz]] +* Availability: 4hrs/week + ## Object Automation ### [[oa/madan]] @@ -146,7 +186,6 @@ Alain's website: * Availability: 5 hours per week * Statistician - ### [[oa/gautham]] * Interests: Digital System Design, PCB Layout, Programming, Machine Learning @@ -186,46 +225,6 @@ Alain's website: ## 3mdeb -## [[Kyle Lehman|klehman]] - -* Languages: C/C++, Java, Python, SQL, assembly -* Interests: Language design, microacrhitecture, OS design, emulation, 3D computation -* Other interests: Nearly anything that floats, flies, or has an engine with wheels - -## [[Andrey Miroshnikov|andreym]] -* Languages: C, Python, Verilog, Shell script -* Interests: Analogue/digital electronics, RF, mobile comms, compilers, FPGAs, discrete mathematics, microarchitecture, Unix OSs, PCB design -* Experience: FPGA/ASIC system validation, instrument automation using VISA, PCB design (KiCAD, Altium) -* Other interests: King James Bible, Russian Synodal Bible, Languages, Philosophy, History -* Availability: Full-time -* IRC: octavius - -## [[Manikandan Nagarajan|Manik]] - -* Languages: Verilog HDL, VHDL, C, Python & TCL -* Experience : Domain Specific Architecture Design and Implementation, IP Core Development, System on Chip, FPGA System Design, Chip Tapeout, Crypto Chip Design, Authentication Protocol Design. -* LinkedIn Profile: [[https://www.linkedin.com/in/manikandan-nagarajan-2156171a0/]] -* Availability: 8~10hrs/week - -## [[Toshaan Bharvani|toshywoshy]] -* Languages: C, C++, Golang, Python, Ruby, Assembly, Java, Javascript, bash, ksh, ... -* Interests: Software on optimized hardware, compilers, FPGAs, microarchitecture, Unix OSs, Linux, Enterprise Software -* Experience: Software, Firmware, BIOS/UEFI, Microcode, Services -* Other interests: History, Mechanics, Tinkering -* Availability: Full-time -* IRC: toshywoshy - -## [[Sadoon Albader|sadoon]] -* Computer engineer specializing in hardware design -* Home system administrator -* Knowledge in Debian, Gentoo, and Arch -* Languages: C, VHDL, SystemVerilog -* Built my own (now unmaintained) powerpc and ppc64 ports for Debian 11, looking to build a clean slate -* Experience: Intel FPGA design, HDL optimization, Software to HDL conversion (SPP), Microprocessor Architecture -* Other Interests: Religion, History, Automobiles -* Website: [[https://soulserv.xyz]] -* Availability: 4hrs/week - ## Former Members ### [[Cole Poirier|cole]]