From: Dmitry Selyutin <ghostmansd@gmail.com>
Date: Sun, 18 Sep 2022 08:09:07 +0000 (+0300)
Subject: power_insn: support ew specifier
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b93ad6d1e2040a3f7a6db16f31ba7b4c61c9083a;p=openpower-isa.git

power_insn: support ew specifier
---

diff --git a/src/openpower/decoder/power_insn.py b/src/openpower/decoder/power_insn.py
index 2007aade..d092bd16 100644
--- a/src/openpower/decoder/power_insn.py
+++ b/src/openpower/decoder/power_insn.py
@@ -1301,7 +1301,18 @@ class BaseRM(_Mapping):
 
 
 class NormalBaseRM(BaseRM):
-    pass
+    @property
+    def specifiers(self):
+        ew = int(self.elwidth)
+        if ew != 0b00:
+            ew = {
+                0b11: "8",
+                0b10: "16",
+                0b01: "32",
+            }[ew]
+            yield f"ew={ew}"
+
+        yield from super().specifiers
 
 
 class NormalSimpleRM(NormalBaseRM):
@@ -1417,7 +1428,18 @@ class NormalRM(NormalBaseRM):
 
 
 class LDSTImmBaseRM(BaseRM):
-    pass
+    @property
+    def specifiers(self):
+        ew = int(self.elwidth)
+        if ew != 0b00:
+            ew = {
+                0b11: "8",
+                0b10: "16",
+                0b01: "32",
+            }[ew]
+            yield f"ew={ew}"
+
+        yield from super().specifiers
 
 
 class LDSTImmSimpleRM(LDSTImmBaseRM):
@@ -1489,7 +1511,18 @@ class LDSTImmRM(LDSTImmBaseRM):
 
 
 class LDSTIdxBaseRM(BaseRM):
-    pass
+    @property
+    def specifiers(self):
+        ew = int(self.elwidth)
+        if ew != 0b00:
+            ew = {
+                0b11: "8",
+                0b10: "16",
+                0b01: "32",
+            }[ew]
+            yield f"ew={ew}"
+
+        yield from super().specifiers
 
 
 class LDSTIdxSimpleRM(LDSTIdxBaseRM):