From: Segher Boessenkool Date: Mon, 1 Jul 2019 15:15:41 +0000 (+0200) Subject: rs6000: Improve indexed addressing X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b94eec3beaf19d2bace6f4f2018d9e0bd1981f56;p=gcc.git rs6000: Improve indexed addressing The function rs6000_force_indexed_or_indirect_mem makes a memory operand suitable for indexed (or indirect) addressing. If the memory address isn't yet valid, it loads the whole thing into a register to make it valid. That isn't optimal. This changes it to load an address that is the sum of two things into two registers instead. This results in lower latency code, and if inside loops, a constant term can be moved outside the loop. * config/rs6000/rs6000.c (rs6000_force_indexed_or_indirect_mem): Load both operands of a PLUS into registers separately. From-SVN: r272886 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 1acb4a32624..868ac766d9e 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2019-07-01 Segher Boessenkool + + * config/rs6000/rs6000.c (rs6000_force_indexed_or_indirect_mem): + Load both operands of a PLUS into registers separately. + 2019-07-01 Andreas Krebbel * config/s390/vector.md: Fix shift count operand printing. diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 5e806736c42..f59f3a96237 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -32100,7 +32100,16 @@ rs6000_force_indexed_or_indirect_mem (rtx x) addr = reg; } - x = replace_equiv_address (x, force_reg (Pmode, addr)); + if (GET_CODE (addr) == PLUS) + { + rtx op0 = XEXP (addr, 0); + rtx op1 = XEXP (addr, 1); + op0 = force_reg (Pmode, op0); + op1 = force_reg (Pmode, op1); + x = replace_equiv_address (x, gen_rtx_PLUS (Pmode, op0, op1)); + } + else + x = replace_equiv_address (x, force_reg (Pmode, addr)); } return x;