From: Xan <Xan@web>
Date: Wed, 25 Apr 2018 05:27:17 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: convert-csv-opcode-to-binary~5550
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b9531e864fa47a644f773f873ba7de971536a1d1;p=libreriscv.git

---

diff --git a/A_Harmonised_RVV_and_Packed_SIMD.mdwn b/A_Harmonised_RVV_and_Packed_SIMD.mdwn
index 1c00eab4f..97c35f6cb 100644
--- a/A_Harmonised_RVV_and_Packed_SIMD.mdwn
+++ b/A_Harmonised_RVV_and_Packed_SIMD.mdwn
@@ -1,4 +1,4 @@
-# Proposal to harmonise RV Vector spec with Packed SIMD ("Harmonised" RVP)
+# Proposal to harmonise RV Vector spec with Andes Packed SIMD ("Harmonised" RVP)
 
 ##### MVL, setvl instruction & VL CSR work as per RV Vector spec.