From: Paolo Bonzini <bonzini@gnu.org>
Date: Fri, 3 Jun 2005 08:09:47 +0000 (+0000)
Subject: re PR testsuite/21292 (gen-vect-11b.c and gen-vect-11c.c fail)
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b956116ebf3235acf5a6b8f94451de7020dfc804;p=gcc.git

re PR testsuite/21292 (gen-vect-11b.c and gen-vect-11c.c fail)

2005-06-03  Paolo Bonzini  <bonzini@gnu.org>

	PR tree-optimization/21292

	* lib/target-supports.exp (check_effective_target_vect_cmdline_needed):
	New.
	* gcc.dg/tree-ssa/gen-vect-11.c, gcc.dg/tree-ssa/gen-vect-11a.c,
	gcc.dg/tree-ssa/gen-vect-11b.c, gcc.dg/tree-ssa/gen-vect-11c.c,
	gcc.dg/tree-ssa/gen-vect-2.c, gcc.dg/tree-ssa/gen-vect-25.c,
	gcc.dg/tree-ssa/gen-vect-26.c, gcc.dg/tree-ssa/gen-vect-28.c,
	gcc.dg/tree-ssa/gen-vect-32.c: Require it.

From-SVN: r100535
---

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 4748fd5c53d..705985f7000 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,15 @@
+2005-06-03  Paolo Bonzini  <bonzini@gnu.org>
+
+	PR tree-optimization/21292
+
+	* lib/target-supports.exp (check_effective_target_vect_cmdline_needed):
+	New.
+	* gcc.dg/tree-ssa/gen-vect-11.c, gcc.dg/tree-ssa/gen-vect-11a.c,
+	gcc.dg/tree-ssa/gen-vect-11b.c, gcc.dg/tree-ssa/gen-vect-11c.c,
+	gcc.dg/tree-ssa/gen-vect-2.c, gcc.dg/tree-ssa/gen-vect-25.c,
+	gcc.dg/tree-ssa/gen-vect-26.c, gcc.dg/tree-ssa/gen-vect-28.c,
+	gcc.dg/tree-ssa/gen-vect-32.c: Require it.
+
 2005-06-02  Richard Henderson  <rth@redhat.com>
 
 	* gcc.dg/sync-2.c: Use -march=i486 for i386.
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-11.c b/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-11.c
index bc6c2869d75..faba5451436 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-11.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-11.c
@@ -1,4 +1,4 @@
-/* { dg-do run } */
+/* { dg-do run { target vect_cmdline_needed } } */
 /* { dg-options "-O2 -ftree-vectorize -ftree-vectorizer-verbose=3 -fdump-tree-vect-stats" } */
 
 #include <stdlib.h>
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-11a.c b/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-11a.c
index 75ec7ce8863..7fbbc0cf37e 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-11a.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-11a.c
@@ -1,4 +1,4 @@
-/* { dg-do run } */
+/* { dg-do run { target vect_cmdline_needed } } */
 /* { dg-options "-O2 -ftree-vectorize -ftree-vectorizer-verbose=3 -fdump-tree-vect-stats" } */
 
 #include <stdlib.h>
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-11b.c b/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-11b.c
index 20833533468..c1c33c3ce1d 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-11b.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-11b.c
@@ -1,4 +1,4 @@
-/* { dg-do run } */
+/* { dg-do run { target vect_cmdline_needed } } */
 /* { dg-options "-O2 -ftree-vectorize -ftree-vectorizer-verbose=3 -fdump-tree-vect-stats" } */
 
 #include <stdlib.h>
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-11c.c b/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-11c.c
index 8632ae42b3a..e57554b8d4e 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-11c.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-11c.c
@@ -1,4 +1,4 @@
-/* { dg-do run } */
+/* { dg-do run { target vect_cmdline_needed } } */
 /* { dg-options "-O2 -ftree-vectorize -ftree-vectorizer-verbose=3 -fdump-tree-vect-stats" } */
 
 #include <stdlib.h>
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-2.c b/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-2.c
index be89c268258..8bee1522dc9 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-2.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-2.c
@@ -1,4 +1,4 @@
-/* { dg-do run } */
+/* { dg-do run { target vect_cmdline_needed } } */
 /* { dg-options "-O2 -ftree-vectorize -ftree-vectorizer-verbose=3 -fdump-tree-vect-stats" } */
 
 #include <stdlib.h>
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-25.c b/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-25.c
index 5cfec85144a..e6127d8b8e6 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-25.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-25.c
@@ -1,4 +1,4 @@
-/* { dg-do run } */
+/* { dg-do run { target vect_cmdline_needed } } */
 /* { dg-options "-O2 -ftree-vectorize -ftree-vectorizer-verbose=3 -fdump-tree-vect-stats" } */
 
 #include <stdlib.h>
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-26.c b/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-26.c
index b90413aa4bf..bd6a51390e1 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-26.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-26.c
@@ -1,4 +1,4 @@
-/* { dg-do run } */
+/* { dg-do run { target vect_cmdline_needed } } */
 /* { dg-options "-O2 -ftree-vectorize -ftree-vectorizer-verbose=3 -fdump-tree-vect-stats" } */
 
 #include <stdlib.h>
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-28.c b/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-28.c
index 0d017529357..4f3bcf84375 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-28.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-28.c
@@ -1,4 +1,4 @@
-/* { dg-do run } */
+/* { dg-do run { target vect_cmdline_needed } } */
 /* { dg-options "-O2 -ftree-vectorize -ftree-vectorizer-verbose=3 -fdump-tree-vect-stats" } */
 
 #include <stdlib.h>
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-32.c b/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-32.c
index 681c7071685..1a46a309daf 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-32.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/gen-vect-32.c
@@ -1,4 +1,4 @@
-/* { dg-do run } */
+/* { dg-do run { target vect_cmdline_needed } } */
 /* { dg-options "-O2 -ftree-vectorize -ftree-vectorizer-verbose=3 -fdump-tree-vect-stats" } */
 
 #include <stdlib.h>
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index b2bec156da3..3b98c6b2d0f 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -725,6 +725,28 @@ proc check_effective_target_lp64 { } {
     return $et_lp64_saved
 }
 
+# Return 1 if the target needs a command line argument to enable a SIMD
+# instruction set.
+#
+# This won't change for different subtargets so cache the result.
+
+proc check_effective_target_vect_cmdline_needed { } {
+    global et_vect_cmdline_needed_saved
+
+    if [info exists et_vect_cmdline_needed_saved] {
+	verbose "check_effective_target_vect_cmdline_needed: using cached result" 2
+    } else {
+	set et_vect_cmdline_needed_saved 1
+	if { [istarget ia64-*-*]
+	      || [istarget x86_64-*-*] } {
+	   set et_vect_cmdline_needed_saved 0
+	}
+    }
+
+    verbose "check_effective_target_vect_cmdline_needed: returning $et_vect_cmdline_needed_saved" 2
+    return $et_vect_cmdline_needed_saved
+}
+
 # Return 1 if the target supports hardware vectors of int, 0 otherwise.
 #
 # This won't change for different subtargets so cache the result.