From: Frank Ch. Eigler <fche@redhat.com>
Date: Mon, 8 May 2000 23:07:39 +0000 (+0000)
Subject: * merge from internal tree
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b9791fcdd66ab49ffb0948b4c0f0e7b9b224f15a;p=binutils-gdb.git

* merge from internal tree

2000-04-14  Gary Thomas  <gthomas@redhat.com>

	* v850.igen: Define 'br *' as illegal since this is the only
	way to provide a breakpoint on some v850 family processors.
---

diff --git a/sim/v850/ChangeLog b/sim/v850/ChangeLog
index 8a826f5d027..cc69829f56a 100644
--- a/sim/v850/ChangeLog
+++ b/sim/v850/ChangeLog
@@ -1,3 +1,8 @@
+2000-04-14  Gary Thomas  <gthomas@redhat.com>
+
+	* v850.igen: Define 'br *' as illegal since this is the only
+	way to provide a breakpoint on some v850 family processors.
+
 2000-03-24  Frank Ch. Eigler  <fche@redhat.com>
 
 	* v850.igen (ilgop): New insn pattern for four-byte breakpoints.
diff --git a/sim/v850/v850.igen b/sim/v850/v850.igen
index eace5a1b132..7fe5370684d 100644
--- a/sim/v850/v850.igen
+++ b/sim/v850/v850.igen
@@ -144,10 +144,16 @@ rrrrr,110110,RRRRR + iiiiiiiiiiiiiiii:VI:::andi
 ddddd,1011,ddd,cccc:III:::Bcond
 "b%s<cccc> <disp9>"
 {
-  int cond = condition_met (cccc);
-  if (cond)
-    nia = cia + disp9;
-  TRACE_BRANCH1 (cond);
+  int cond;
+  if ((ddddd == 0x00) && (ddd == 0x00) && (cccc == 0x05)) {
+    // Special case - treat "br *" like illegal instruction
+    sim_engine_halt (SD, CPU, NULL, cia, sim_stopped, SIM_SIGTRAP);
+  } else {
+    cond = condition_met (cccc);
+    if (cond)
+      nia = cia + disp9;
+    TRACE_BRANCH1 (cond);
+  }
 }
 
 
@@ -1158,6 +1164,11 @@ rrrrr,110101,RRRRR + iiiiiiiiiiiiiiii:VI:::xori
   sim_engine_halt (SD, CPU, NULL, cia, sim_stopped, SIM_SIGTRAP);
 }
 
+// True illegal instruction
+00000,111111,00000 + 00000,11111,100000:X:::ilgop
+{
+  sim_engine_halt (SD, CPU, NULL, cia, sim_stopped, SIM_SIGTRAP);
+}
 
 
 // DIVHN