From: Olof Kindgren <olof.kindgren@gmail.com>
Date: Fri, 23 Aug 2019 12:20:20 +0000 (+0200)
Subject: Added synthesis target
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=b9bf19f9120a8549f66ed480568ca28edd8e7765;p=microwatt.git

Added synthesis target

The synth target can be used to analyze the core after synthesis
without running P&R. Currently, the only edalize backends that
support synthesis without P&R are vivado and icestorm, and icestorm
needs yosys built with verific support to parse vhdl.

To run synthesis only for a part, run

fusesoc run --target=synth --tool=vivado microwatt --part=<part>

where part is a valid Xilinx part such as xc7a100tcsg324-1
---

diff --git a/microwatt.core b/microwatt.core
index 30354ce..1abc558 100644
--- a/microwatt.core
+++ b/microwatt.core
@@ -66,6 +66,12 @@ targets:
       vivado: {part : xc7a200tsbg484-1}
     toplevel : toplevel
 
+  synth:
+    filesets: [core]
+    tools:
+      vivado: {pnr : none}
+    toplevel: core
+
 parameters:
   memory_size:
     datatype    : int