From: Luke Kenneth Casson Leighton Date: Sat, 14 May 2022 11:07:59 +0000 (+0100) Subject: add PIM-HBM and ETP4HPC X-Git-Tag: opf_rfc_ls005_v1~2243 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ba08b43ce8a2c151b6b929c81a55592d904136b1;p=libreriscv.git add PIM-HBM and ETP4HPC --- diff --git a/openpower/sv/2022-05-14_11-55.jpg b/openpower/sv/2022-05-14_11-55.jpg new file mode 100644 index 000000000..341d53ffb Binary files /dev/null and b/openpower/sv/2022-05-14_11-55.jpg differ diff --git a/openpower/sv/SimpleV_rationale.mdwn b/openpower/sv/SimpleV_rationale.mdwn index c897610c0..4f9266ccf 100644 --- a/openpower/sv/SimpleV_rationale.mdwn +++ b/openpower/sv/SimpleV_rationale.mdwn @@ -1152,3 +1152,21 @@ same category. in power. The article notes, pointedly, that programmability will be a key deciding factor. The article also notes that Samsung has proposed its architecture as a JEDEC Standard. + +**PIM-HBM Research** + +[Presentation](https://ieeexplore.ieee.org/document/9073325/) by Seongguk Kim +and associated [video](https://www.youtube.com/watch?v=e4zU6u0YIRU) +showing 3D-stacked DRAM connected to GPUs, but notes that even HBM, due to +large GPU size, is less advantageous than it should be. Processing-in-Memory +is therefore logically proposed. the PE (named a Streaming Multiprocessor) +is much more sophisticated, comprising Register File, L1 Cache, FP32, FP64 +and a Tensor Unit. + + + +**etp4hpc.eu** + +[ETP 4 HPC](https://etp4hpc.eu) is a European Joint-initiative for +[Processing in Memory](https://www.etp4hpc.eu/pujades/files/ETP4HPC_WP_Processing-In-Memory_FINAL.pdf) +