From: Florent Kermarrec Date: Tue, 17 Mar 2015 10:51:34 +0000 (+0100) Subject: mibuild/platforms/versa: add rst_n X-Git-Tag: 24jan2021_ls180~2099^2~174 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ba2aeb08be7e225a324afb0e5788a664eb6be5e1;p=litex.git mibuild/platforms/versa: add rst_n --- diff --git a/mibuild/platforms/versa.py b/mibuild/platforms/versa.py index 66e176c8..1a240ace 100644 --- a/mibuild/platforms/versa.py +++ b/mibuild/platforms/versa.py @@ -7,6 +7,7 @@ from mibuild.lattice.programmer import LatticeProgrammer _io = [ ("clk100", 0, Pins("L5"), IOStandard("LVDS25")), + ("rst_n", 0, Pins("A21"),IOStandard("LVCMOS33")), ("user_led", 0, Pins("Y20"), IOStandard("LVCMOS33")), ("user_led", 1, Pins("AA21"), IOStandard("LVCMOS33")),