From: Andreas Krebbel Date: Mon, 15 Feb 2021 13:20:00 +0000 (+0100) Subject: IBM Z: Implement instruction set extensions X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ba2b480f1037082d27da1afdfe0793c8aac9b1bd;p=binutils-gdb.git IBM Z: Implement instruction set extensions opcodes/ * s390-mkopc.c (main): Accept arch14 as cpu string. * s390-opc.txt: Add new arch14 instructions. include/ * opcode/s390.h (enum s390_opcode_cpu_val): Add S390_OPCODE_ARCH14. gas/ * config/tc-s390.c (s390_parse_cpu): New entry for arch14. * doc/c-s390.texi: Document arch14 march option. * testsuite/gas/s390/s390.exp: Run the arch14 related tests. * testsuite/gas/s390/zarch-arch14.d: New test. * testsuite/gas/s390/zarch-arch14.s: New test. --- diff --git a/gas/ChangeLog b/gas/ChangeLog index d21ff558f1b..9c6fe109d92 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,11 @@ +2021-02-15 Andreas Krebbel + + * config/tc-s390.c (s390_parse_cpu): New entry for arch14. + * doc/c-s390.texi: Document arch14 march option. + * testsuite/gas/s390/s390.exp: Run the arch14 related tests. + * testsuite/gas/s390/zarch-arch14.d: New test. + * testsuite/gas/s390/zarch-arch14.s: New test. + 2021-02-12 Nick Clifton * testsuite/gas/mach-o/sections-1.d: Stop automatic debug link diff --git a/gas/config/tc-s390.c b/gas/config/tc-s390.c index c6daef99fde..f23d9863d3d 100644 --- a/gas/config/tc-s390.c +++ b/gas/config/tc-s390.c @@ -292,6 +292,8 @@ s390_parse_cpu (const char * arg, { STRING_COMMA_LEN ("z14"), STRING_COMMA_LEN ("arch12"), S390_INSTR_FLAG_HTM | S390_INSTR_FLAG_VX }, { STRING_COMMA_LEN ("z15"), STRING_COMMA_LEN ("arch13"), + S390_INSTR_FLAG_HTM | S390_INSTR_FLAG_VX }, + { STRING_COMMA_LEN (""), STRING_COMMA_LEN ("arch14"), S390_INSTR_FLAG_HTM | S390_INSTR_FLAG_VX } }; static struct diff --git a/gas/doc/c-s390.texi b/gas/doc/c-s390.texi index 02881c3c8be..1d86f091e67 100644 --- a/gas/doc/c-s390.texi +++ b/gas/doc/c-s390.texi @@ -18,7 +18,7 @@ and eleven chip levels. The architecture modes are the Enterprise System Architecture (ESA) and the newer z/Architecture mode. The chip levels are g5 (or arch3), g6, z900 (or arch5), z990 (or arch6), z9-109, z9-ec (or arch7), z10 (or arch8), z196 (or arch9), zEC12 (or arch10), z13 -(or arch11), z14 (or arch12), and z15 (or arch13). +(or arch11), z14 (or arch12), z15 (or arch13), or arch14. @menu * s390 Options:: Command-line Options. @@ -70,8 +70,9 @@ are recognized: @code{z196} (or @code{arch9}), @code{zEC12} (or @code{arch10}), @code{z13} (or @code{arch11}), -@code{z14} (or @code{arch12}), and -@code{z15} (or @code{arch13}). +@code{z14} (or @code{arch12}), +@code{z15} (or @code{arch13}), and +@code{arch14}. Assembling an instruction that is not supported on the target processor results in an error message. diff --git a/gas/testsuite/gas/s390/s390.exp b/gas/testsuite/gas/s390/s390.exp index f87a09a8633..d03555a7aef 100644 --- a/gas/testsuite/gas/s390/s390.exp +++ b/gas/testsuite/gas/s390/s390.exp @@ -31,6 +31,7 @@ if [expr [istarget "s390-*-*"] || [istarget "s390x-*-*"]] then { run_dump_test "zarch-z13" "{as -m64} {as -march=z13}" run_dump_test "zarch-arch12" "{as -m64} {as -march=arch12}" run_dump_test "zarch-arch13" "{as -m64} {as -march=arch13}" + run_dump_test "zarch-arch14" "{as -m64} {as -march=arch14}" run_dump_test "zarch-reloc" "{as -m64}" run_dump_test "zarch-operands" "{as -m64} {as -march=z9-109}" run_dump_test "zarch-machine" "{as -m64} {as -march=z900}" diff --git a/gas/testsuite/gas/s390/zarch-arch14.d b/gas/testsuite/gas/s390/zarch-arch14.d new file mode 100644 index 00000000000..97c4fd54719 --- /dev/null +++ b/gas/testsuite/gas/s390/zarch-arch14.d @@ -0,0 +1,31 @@ +#name: s390x opcode +#objdump: -dr + +.*: +file format .* + +Disassembly of section .text: + +.* : +.*: e6 f1 40 c0 d6 74 [ ]*vschp %v15,%v17,%v20,13,12 +.*: e6 f1 40 d0 26 74 [ ]*vschsp %v15,%v17,%v20,13 +.*: e6 f1 40 d0 36 74 [ ]*vschdp %v15,%v17,%v20,13 +.*: e6 f1 40 d0 46 74 [ ]*vschxp %v15,%v17,%v20,13 +.*: e6 f1 40 00 06 7c [ ]*vscshp %v15,%v17,%v20 +.*: e6 f1 40 d0 06 7d [ ]*vcsph %v15,%v17,%v20,13 +.*: e6 f1 00 d0 04 51 [ ]*vclzdp %v15,%v17,13 +.*: e6 f1 40 cf d6 70 [ ]*vpkzr %v15,%v17,%v20,253,12 +.*: e6 f1 40 cf d6 72 [ ]*vsrpr %v15,%v17,%v20,253,12 +.*: e6 f1 00 d0 04 54 [ ]*vupkzh %v15,%v17,13 +.*: e6 f1 00 d0 04 5c [ ]*vupkzl %v15,%v17,13 +.*: b9 3b 00 00 [ ]*nnpa +.*: e6 f1 00 0c d4 56 [ ]*vclfnh %v15,%v17,13,12 +.*: e6 f1 00 0c d4 5e [ ]*vclfnl %v15,%v17,13,12 +.*: e6 f1 40 0c d6 75 [ ]*vcrnf %v15,%v17,%v20,13,12 +.*: e6 f1 00 0c d4 5d [ ]*vcfn %v15,%v17,13,12 +.*: e6 f1 00 0c d4 55 [ ]*vcnf %v15,%v17,13,12 +.*: b9 8b 90 6b [ ]*rdp %r6,%r9,%r11 +.*: b9 8b 9d 6b [ ]*rdp %r6,%r9,%r11,13 +.*: eb fd 68 f0 fd 71 [ ]*lpswey -10000\(%r6\),253 +.*: b2 00 6f a0 [ ]*lbear 4000\(%r6\) +.*: b2 01 6f a0 [ ]*stbear 4000\(%r6\) +.*: 07 07 [ ]*nopr %r7 diff --git a/gas/testsuite/gas/s390/zarch-arch14.s b/gas/testsuite/gas/s390/zarch-arch14.s new file mode 100644 index 00000000000..830382f0ac5 --- /dev/null +++ b/gas/testsuite/gas/s390/zarch-arch14.s @@ -0,0 +1,24 @@ +.text +foo: + vschp %v15,%v17,%v20,13,12 + vschsp %v15,%v17,%v20,13 + vschdp %v15,%v17,%v20,13 + vschxp %v15,%v17,%v20,13 + vscshp %v15,%v17,%v20 + vcsph %v15,%v17,%v20,13 + vclzdp %v15,%v17,13 + vpkzr %v15,%v17,%v20,253,12 + vsrpr %v15,%v17,%v20,253,12 + vupkzh %v15,%v17,13 + vupkzl %v15,%v17,13 + nnpa + vclfnh %v15,%v17,13,12 + vclfnl %v15,%v17,13,12 + vcrnf %v15,%v17,%v20,13,12 + vcfn %v15,%v17,13,12 + vcnf %v15,%v17,13,12 + rdp %r6,%r9,%r11 + rdp %r6,%r9,%r11,13 + lpswey -10000(%r6),253 + lbear 4000(%r6) + stbear 4000(%r6) diff --git a/include/ChangeLog b/include/ChangeLog index 18237b5f9c4..6c3a835afd1 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,3 +1,8 @@ +2021-02-15 Andreas Krebbel + + * opcode/s390.h (enum s390_opcode_cpu_val): Add + S390_OPCODE_ARCH14. + 2021-02-08 Mike Frysinger * opcode/tic54x.h (mmregs): Rename to ... diff --git a/include/opcode/s390.h b/include/opcode/s390.h index cc112b01588..868ae2f02dc 100644 --- a/include/opcode/s390.h +++ b/include/opcode/s390.h @@ -44,6 +44,7 @@ enum s390_opcode_cpu_val S390_OPCODE_Z13, S390_OPCODE_ARCH12, S390_OPCODE_ARCH13, + S390_OPCODE_ARCH14, S390_OPCODE_MAXCPU }; diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index fa1830e6cee..f94d0f439bf 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2021-02-15 Andreas Krebbel + + * s390-mkopc.c (main): Accept arch14 as cpu string. + * s390-opc.txt: Add new arch14 instructions. + 2021-02-04 Nick Alcock * configure.ac (SHARED_LIBADD): Remove explicit -lintl population in diff --git a/opcodes/s390-mkopc.c b/opcodes/s390-mkopc.c index bf2ef41d13a..bcd453314a1 100644 --- a/opcodes/s390-mkopc.c +++ b/opcodes/s390-mkopc.c @@ -381,6 +381,8 @@ main (void) else if (strcmp (cpu_string, "z15") == 0 || strcmp (cpu_string, "arch13") == 0) min_cpu = S390_OPCODE_ARCH13; + else if (strcmp (cpu_string, "arch14") == 0) + min_cpu = S390_OPCODE_ARCH14; else { fprintf (stderr, "Couldn't parse cpu string %s\n", cpu_string); exit (1); diff --git a/opcodes/s390-opc.txt b/opcodes/s390-opc.txt index 1f921563aa4..aa00b4f3b69 100644 --- a/opcodes/s390-opc.txt +++ b/opcodes/s390-opc.txt @@ -2016,3 +2016,31 @@ e60000000052 vcvbg VRR_RV0UU "vector convert to binary 64 bit" arch13 zarch optp # Message Security Assist Extension 9 b93a kdsa RRE_RR "compute digital signature authentication" arch13 zarch + + +# arch14 instructions + +e60000000074 vschp VRR_VVV0U0U " " arch14 zarch +e60000002074 vschsp VRR_VVV0U0 " " arch14 zarch +e60000003074 vschdp VRR_VVV0U0 " " arch14 zarch +e60000004074 vschxp VRR_VVV0U0 " " arch14 zarch +e6000000007c vscshp VRR_VVV " " arch14 zarch +e6000000007d vcsph VRR_VVV0U0 " " arch14 zarch +e60000000051 vclzdp VRR_VV0U2 " " arch14 zarch +e60000000070 vpkzr VRI_VVV0UU2 " " arch14 zarch +e60000000072 vsrpr VRI_VVV0UU2 " " arch14 zarch +e60000000054 vupkzh VRR_VV0U2 " " arch14 zarch +e6000000005c vupkzl VRR_VV0U2 " " arch14 zarch + +b93b nnpa RRE_00 " " arch14 zarch +e60000000056 vclfnh VRR_VV0UU2 " " arch14 zarch +e6000000005e vclfnl VRR_VV0UU2 " " arch14 zarch +e60000000075 vcrnf VRR_VVV0UU " " arch14 zarch +e6000000005d vcfn VRR_VV0UU2 " " arch14 zarch +e60000000055 vcnf VRR_VV0UU2 " " arch14 zarch + +b98B rdp RRF_RURR2 " " arch14 zarch optparm + +eb0000000071 lpswey SIY_URD " " arch14 zarch +b200 lbear S_RD " " arch14 zarch +b201 stbear S_RD " " arch14 zarch