From: Connor Abbott <cwabbott0@gmail.com>
Date: Thu, 5 May 2016 09:40:41 +0000 (+0200)
Subject: i965/fs: add PACK opcode
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ba582e58cd30c815137a11c9497b01d97842e525;p=mesa.git

i965/fs: add PACK opcode

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
---

diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index 60b696cfb98..4696faf082e 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -1013,6 +1013,15 @@ enum opcode {
     */
    SHADER_OPCODE_LOAD_PAYLOAD,
 
+   /**
+    * Packs a number of sources into a single value. Unlike LOAD_PAYLOAD, this
+    * acts intra-channel, obtaining the final value for each channel by
+    * combining the sources values for the same channel, the first source
+    * occupying the lowest bits and the last source occupying the highest
+    * bits.
+    */
+   FS_OPCODE_PACK,
+
    SHADER_OPCODE_SHADER_TIME_ADD,
 
    /**
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index b02f1dc0b91..d32d75990de 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -4523,7 +4523,8 @@ get_lowered_simd_width(const struct brw_device_info *devinfo,
    case SHADER_OPCODE_INT_QUOTIENT:
    case SHADER_OPCODE_INT_REMAINDER:
    case SHADER_OPCODE_SIN:
-   case SHADER_OPCODE_COS: {
+   case SHADER_OPCODE_COS:
+   case FS_OPCODE_PACK: {
       /* According to the PRMs:
        *  "A. In Direct Addressing mode, a source cannot span more than 2
        *      adjacent GRF registers.
diff --git a/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp b/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp
index 4d727c131d5..3c702d8b36e 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp
@@ -550,6 +550,7 @@ fs_visitor::try_constant_propagate(fs_inst *inst, acp_entry *entry)
       switch (inst->opcode) {
       case BRW_OPCODE_MOV:
       case SHADER_OPCODE_LOAD_PAYLOAD:
+      case FS_OPCODE_PACK:
          inst->src[i] = val;
          progress = true;
          break;
diff --git a/src/mesa/drivers/dri/i965/brw_fs_cse.cpp b/src/mesa/drivers/dri/i965/brw_fs_cse.cpp
index 0e743de7faf..15af2c1fabf 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_cse.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_cse.cpp
@@ -81,6 +81,7 @@ is_expression(const fs_visitor *v, const fs_inst *const inst)
    case SHADER_OPCODE_EXTRACT_BYTE:
    case SHADER_OPCODE_EXTRACT_WORD:
    case SHADER_OPCODE_MOV_INDIRECT:
+   case FS_OPCODE_PACK:
       return true;
    case SHADER_OPCODE_RCP:
    case SHADER_OPCODE_RSQ:
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp
index 325141b2d6b..0e33953f8cf 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -289,6 +289,8 @@ brw_instruction_name(const struct brw_device_info *devinfo, enum opcode op)
 
    case SHADER_OPCODE_LOAD_PAYLOAD:
       return "load_payload";
+   case FS_OPCODE_PACK:
+      return "pack";
 
    case SHADER_OPCODE_GEN4_SCRATCH_READ:
       return "gen4_scratch_read";