From: Shriya Sharma <shriya@redsemiconductor.com>
Date: Tue, 17 Oct 2023 13:36:07 +0000 (+0100)
Subject: added spaces for lwzup instruction in  the pifixedload.mdwm
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=ba756b62d24bbb1fefce9c5d555e3523c0702ed0;p=openpower-isa.git

added spaces for lwzup instruction in  the pifixedload.mdwm
---

diff --git a/openpower/isa/pifixedload.mdwn b/openpower/isa/pifixedload.mdwn
index a9f67ebf..f7528503 100644
--- a/openpower/isa/pifixedload.mdwn
+++ b/openpower/isa/pifixedload.mdwn
@@ -186,7 +186,6 @@ Description:
 
     If RA=0 or RA=RT, the instruction form is invalid.
 
-
 Special Registers Altered:
 
     None