From: Andrew Zonenberg <azonenberg@drawersteak.com>
Date: Tue, 12 Jul 2016 05:45:42 +0000 (-0700)
Subject: Removed VOUT port of GP_BANDGAP
X-Git-Tag: yosys-0.7~174^2~2
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=baae472b83b3dac1293bb95ff0a87d9180a67479;p=yosys.git

Removed VOUT port of GP_BANDGAP
---

diff --git a/techlibs/greenpak4/cells_sim.v b/techlibs/greenpak4/cells_sim.v
index 67f00f3a4..bf178a08a 100644
--- a/techlibs/greenpak4/cells_sim.v
+++ b/techlibs/greenpak4/cells_sim.v
@@ -36,7 +36,7 @@ module GP_ACMP(input wire PWREN, input wire VIN, input wire VREF, output reg OUT
 
 endmodule
 
-module GP_BANDGAP(output reg OK, output reg VOUT);
+module GP_BANDGAP(output reg OK);
 	parameter AUTO_PWRDN = 1;
 	parameter CHOPPER_EN = 1;
 	parameter OUT_DELAY = 100;