From: lkcl <lkcl@web>
Date: Sun, 23 Apr 2023 16:32:48 +0000 (+0100)
Subject: (no commit message)
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=bacd205c206bab19e9debd4e6a6e0b7933f0be55;p=libreriscv.git

---

diff --git a/openpower/sv/sprs.mdwn b/openpower/sv/sprs.mdwn
index ed5e0652d..e561f972e 100644
--- a/openpower/sv/sprs.mdwn
+++ b/openpower/sv/sprs.mdwn
@@ -2,19 +2,19 @@
 
 The full list of SPRs for Simple-V is:
 
-* **SVSTATE** 64-bit.
-* **SVLR** 64-bit.
-* **SVSHAPE0** 32-bit
-* **SVSHAPE1** 32-bit
-* **SVSHAPE2** 32-bit
-* **SVSHAPE3** 32-bit
+|---------------|---------|---------------------------------|
+| **SVSTATE**   | 64-bit  | Zero-Overhead Loop Architectural State   |
+| **SVLR**      | 64-bit  | SVSTATE equivalent of LR-to-PC  |
+| **SVSHAPE0**  | 32-bit  |  REMAP Shape 0   |
+| **SVSHAPE1**  | 32-bit  |  REMAP Shape 0   |
+| **SVSHAPE2**  | 32-bit  |  REMAP Shape 0   |
+| **SVSHAPE3**  | 32-bit  |  REMAP Shape 0   |
 
 Future versions of Simple-V will have at least 7 more SVSTATE SPRs, in a small
 "stack", as part of a full Zero-Overhead Loop Control subsystem.
 
 ## SVSTATE SPR 
 
-
 The format of the SVSTATE SPR is as follows:
 
 | Field | Name     | Description           |