From: Raptor Engineering Development Team <support@raptorengineering.com>
Date: Tue, 1 Mar 2022 21:24:04 +0000 (-0600)
Subject: Add missing mapping between HAS and USE for Liteeth and Tercel on Arctic Tern
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=bb092e5a54b1caf855f5249ae37e22243ab5d549;p=microwatt.git

Add missing mapping between HAS and USE for Liteeth and Tercel on Arctic Tern
---

diff --git a/fpga/top-rcs-arctic-tern-bmc-card.vhdl b/fpga/top-rcs-arctic-tern-bmc-card.vhdl
index f441cac..3b02aa3 100644
--- a/fpga/top-rcs-arctic-tern-bmc-card.vhdl
+++ b/fpga/top-rcs-arctic-tern-bmc-card.vhdl
@@ -169,6 +169,8 @@ begin
             SPI_FLASH_DEF_CKDV => SPI_FLASH_DEF_CKDV,
             SPI_FLASH_DEF_QUAD => SPI_FLASH_DEF_QUAD,
             LOG_LENGTH         => LOG_LENGTH,
+            HAS_LITEETH        => USE_LITEETH,
+            HAS_TERCEL         => USE_TERCEL,
             UART0_IS_16550     => UART_IS_16550,
             HAS_UART1          => HAS_UART1,
             ICACHE_NUM_LINES   => ICACHE_NUM_LINES