From: Jim Wilson <jimw@sifive.com>
Date: Fri, 6 Jul 2018 00:49:11 +0000 (-0700)
Subject: RISC-V: Add riscv-*-* configure support, and minor cleanup.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=bb11866d6a635fadb9285d18e2fb819d2de2c28c;p=binutils-gdb.git

RISC-V: Add riscv-*-* configure support, and minor cleanup.

	bfd/
	* config.bfd (riscv32*-*-*): Renamed from riscv32-*-*.
	(riscv64*-*-*): Likewise.
	(riscv-*-*): Add as an alias for riscv32*-*-*.

	ld/
	* configure.tgt (riscv-*-*): Add as an alias for riscv32*-*-*.
---

diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 36e12e785dc..650258ef8b9 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,9 @@
+2018-07-05  Jim Wilson  <jimw@sifive.com>
+
+	* config.bfd (riscv32*-*-*): Renamed from riscv32-*-*.
+	(riscv64*-*-*): Likewise.
+	(riscv-*-*): Add as an alias for riscv32*-*-*.
+
 2018-07-05  H.J. Lu  <hongjiu.lu@intel.com>
 
 	PR ld/23372
diff --git a/bfd/config.bfd b/bfd/config.bfd
index f8ca72b3323..6391f35684e 100644
--- a/bfd/config.bfd
+++ b/bfd/config.bfd
@@ -1174,12 +1174,12 @@ case "${targ}" in
     ;;
 
 #ifdef BFD64
-  riscv32-*-*)
+  riscv-*-* | riscv32*-*-*)
     targ_defvec=riscv_elf32_vec
     targ_selvecs="riscv_elf32_vec riscv_elf64_vec"
     want64=true
     ;;
-  riscv64-*-*)
+  riscv64*-*-*)
     targ_defvec=riscv_elf64_vec
     targ_selvecs="riscv_elf32_vec riscv_elf64_vec"
     want64=true
diff --git a/ld/ChangeLog b/ld/ChangeLog
index e3fc4e84409..b9bfc2b1f76 100644
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,3 +1,7 @@
+2018-07-05  Jim Wilson  <jimw@sifive.com>
+
+	* configure.tgt (riscv-*-*): Add as an alias for riscv32*-*-*.
+
 2018-07-05  Maciej W. Rozycki  <macro@mips.com>
 
 	* testsuite/ld-mips-elf/mips-elf.exp: Replace remaining calls to
diff --git a/ld/configure.tgt b/ld/configure.tgt
index 3386c3d9287..fad8b2e5c84 100644
--- a/ld/configure.tgt
+++ b/ld/configure.tgt
@@ -632,7 +632,8 @@ pru*-*-*)		targ_emul=pruelf ;;
 riscv32*-*-linux*)	targ_emul=elf32lriscv
 			targ_extra_emuls="elf32lriscv_ilp32f elf32lriscv_ilp32 elf64lriscv elf64lriscv_lp64f elf64lriscv_lp64"
 			targ_extra_libpath=$targ_extra_emuls ;;
-riscv32*-*-*)		targ_emul=elf32lriscv
+riscv-*-* | riscv32*-*-*)
+			targ_emul=elf32lriscv
 			targ_extra_emuls="elf64lriscv"
 			targ_extra_libpath=$targ_extra_emuls ;;
 riscv64*-*-linux*)	targ_emul=elf64lriscv