From: Andreas Schwab Date: Sat, 18 Apr 2020 12:32:39 +0000 (+0200) Subject: Disallow PC relative for CMPI on MC68000/10 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=bb2a1453479dfa2589f3b62853d4e1cf60825e98;p=binutils-gdb.git Disallow PC relative for CMPI on MC68000/10 The MC68000/10 decodes the second operand of CMPI strictly as destination operand, which disallows PC relative addressing, even though the insn doesn't write to the operand. This restriction has only been lifted for the MC68020+ and CPU32. opcodes: PR 25848 * m68k-opc.c (m68k_opcodes): Allow pc-rel for second operand of cmpi only on m68020up and cpu32. gas: PR 25848 * testsuite/gas/m68k/operands.s: Add tests for cmpi. * testsuite/gas/m68k/operands.d: Update. * testsuite/gas/m68k/op68000.d: Update for new error messages. --- diff --git a/gas/ChangeLog b/gas/ChangeLog index 757263330c7..cccb6bc4c23 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,10 @@ +2020-04-21 Andreas Schwab + + PR 25848 + * testsuite/gas/m68k/operands.s: Add tests for cmpi. + * testsuite/gas/m68k/operands.d: Update. + * testsuite/gas/m68k/op68000.d: Update for new error messages. + 2020-04-21 Tamar Christina PR binutils/24753 diff --git a/gas/testsuite/gas/m68k/op68000.d b/gas/testsuite/gas/m68k/op68000.d index 568d5a3a6cd..b5d1d7b93fc 100644 --- a/gas/testsuite/gas/m68k/op68000.d +++ b/gas/testsuite/gas/m68k/op68000.d @@ -193,3 +193,9 @@ .*statement `pea \(\[%zpc,%a0\],2000\)' ignored .*statement `pea \(\[%zpc,%d0:w:2\]\)' ignored .*statement `pea \(\[%d0,%zpc\]\)' ignored +.*statement `cmpib &1,0\(%pc\)' ignored +.*statement `cmpiw &1,0\(%pc\)' ignored +.*statement `cmpil &1,0\(%pc\)' ignored +.*statement `cmpb &1,0\(%pc\)' ignored +.*statement `cmpw &1,0\(%pc\)' ignored +.*statement `cmpl &1,0\(%pc\)' ignored diff --git a/gas/testsuite/gas/m68k/operands.d b/gas/testsuite/gas/m68k/operands.d index 5b383c3f970..465ae88dac3 100644 --- a/gas/testsuite/gas/m68k/operands.d +++ b/gas/testsuite/gas/m68k/operands.d @@ -240,3 +240,15 @@ Disassembly of section .text: 0+508 addiw #1,%d0 0+50c addil #1,%d0 0+512 addqb #1,%d0 +0+514 cmpib #1,%d0 +0+518 cmpib #1,%pc@\(0+51c \) +0+51e cmpiw #1,%d0 +0+522 cmpiw #1,%pc@\(0+526 \) +0+528 cmpil #1,%d0 +0+52e cmpil #1,%pc@\(0+534 \) +0+536 cmpib #1,%d0 +0+53a cmpib #1,%pc@\(0+53e \) +0+540 cmpiw #1,%d0 +0+544 cmpiw #1,%pc@\(0+548 \) +0+54a cmpil #1,%d0 +0+550 cmpil #1,%pc@\(0+556 \) diff --git a/gas/testsuite/gas/m68k/operands.s b/gas/testsuite/gas/m68k/operands.s index b09f56fee12..382d95d3e85 100644 --- a/gas/testsuite/gas/m68k/operands.s +++ b/gas/testsuite/gas/m68k/operands.s @@ -270,3 +270,18 @@ foo: addiw &1,%d0 addil &1,%d0 addqb &1,%d0 + + | cmpi + cmpib &1,%d0 + cmpib &1,0(%pc) + cmpiw &1,%d0 + cmpiw &1,0(%pc) + cmpil &1,%d0 + cmpil &1,0(%pc) + cmpb &1,%d0 + cmpb &1,0(%pc) + cmpw &1,%d0 + cmpw &1,0(%pc) + cmpl &1,%d0 + cmpl &1,0(%pc) + diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 157a362b85d..e2cbe60cde1 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,9 @@ +2020-04-21 Andreas Schwab + + PR 25848 + * m68k-opc.c (m68k_opcodes): Allow pc-rel for second operand of + cmpi only on m68020up and cpu32. + 2020-04-20 Sudakshina Das * aarch64-asm.c (aarch64_ins_none): New. diff --git a/opcodes/m68k-opc.c b/opcodes/m68k-opc.c index e13f116c345..db198941f07 100644 --- a/opcodes/m68k-opc.c +++ b/opcodes/m68k-opc.c @@ -265,11 +265,14 @@ const struct m68k_opcode m68k_opcodes[] = {"cmpaw", 2, one(0130300), one(0170700), "*wAd", m68000up }, {"cmpal", 2, one(0130700), one(0170700), "*lAd", m68000up | mcfisa_a }, -{"cmpib", 4, one(0006000), one(0177700), "#b@s", m68000up }, +{"cmpib", 4, one(0006000), one(0177700), "#b$s", m68000 | m68010 }, +{"cmpib", 4, one(0006000), one(0177700), "#b@s", m68020up | cpu32 | fido_a }, {"cmpib", 4, one(0006000), one(0177700), "#bDs", mcfisa_b | mcfisa_c }, -{"cmpiw", 4, one(0006100), one(0177700), "#w@s", m68000up }, +{"cmpiw", 4, one(0006100), one(0177700), "#w$s", m68000 | m68010 }, +{"cmpiw", 4, one(0006100), one(0177700), "#w@s", m68020up | cpu32 | fido_a }, {"cmpiw", 4, one(0006100), one(0177700), "#wDs", mcfisa_b | mcfisa_c }, -{"cmpil", 6, one(0006200), one(0177700), "#l@s", m68000up }, +{"cmpil", 6, one(0006200), one(0177700), "#l$s", m68000 | m68010 }, +{"cmpil", 6, one(0006200), one(0177700), "#l@s", m68020up | cpu32 | fido_a }, {"cmpil", 6, one(0006200), one(0177700), "#lDs", mcfisa_a }, {"cmpmb", 2, one(0130410), one(0170770), "+s+d", m68000up }, @@ -277,18 +280,21 @@ const struct m68k_opcode m68k_opcodes[] = {"cmpml", 2, one(0130610), one(0170770), "+s+d", m68000up }, /* The cmp opcode can generate the cmpa, cmpm, and cmpi instructions. */ -{"cmpb", 4, one(0006000), one(0177700), "#b@s", m68000up }, +{"cmpb", 4, one(0006000), one(0177700), "#b$s", m68000 | m68010 }, +{"cmpb", 4, one(0006000), one(0177700), "#b@s", m68020up | cpu32 | fido_a }, {"cmpb", 4, one(0006000), one(0177700), "#bDs", mcfisa_b | mcfisa_c }, {"cmpb", 2, one(0130410), one(0170770), "+s+d", m68000up }, {"cmpb", 2, one(0130000), one(0170700), ";bDd", m68000up }, {"cmpb", 2, one(0130000), one(0170700), "*bDd", mcfisa_b | mcfisa_c }, {"cmpw", 2, one(0130300), one(0170700), "*wAd", m68000up }, -{"cmpw", 4, one(0006100), one(0177700), "#w@s", m68000up }, +{"cmpw", 4, one(0006100), one(0177700), "#w$s", m68000 | m68010 }, +{"cmpw", 4, one(0006100), one(0177700), "#w@s", m68020up | cpu32 | fido_a }, {"cmpw", 4, one(0006100), one(0177700), "#wDs", mcfisa_b | mcfisa_c }, {"cmpw", 2, one(0130510), one(0170770), "+s+d", m68000up }, {"cmpw", 2, one(0130100), one(0170700), "*wDd", m68000up | mcfisa_b | mcfisa_c }, {"cmpl", 2, one(0130700), one(0170700), "*lAd", m68000up | mcfisa_a }, -{"cmpl", 6, one(0006200), one(0177700), "#l@s", m68000up }, +{"cmpl", 6, one(0006200), one(0177700), "#l$s", m68000 | m68010 }, +{"cmpl", 6, one(0006200), one(0177700), "#l@s", m68020up | cpu32 | fido_a }, {"cmpl", 6, one(0006200), one(0177700), "#lDs", mcfisa_a }, {"cmpl", 2, one(0130610), one(0170770), "+s+d", m68000up }, {"cmpl", 2, one(0130200), one(0170700), "*lDd", m68000up | mcfisa_a },