From: Vladimir N. Makarov Date: Fri, 9 Oct 2020 14:01:13 +0000 (-0400) Subject: Don't keep strict_low_part in reloads for non-registers. [PR97313] X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=bb37ad8cc0fc937c7afcdab471e5d65d176041c3;p=gcc.git Don't keep strict_low_part in reloads for non-registers. [PR97313] gcc/ChangeLog: 2020-10-09 Vladimir Makarov PR rtl-optimization/97313 * lra-constraints.c (match_reload): Don't keep strict_low_part in reloads for non-registers. gcc/testsuite/ChangeLog: 2020-10-09 Vladimir Makarov PR rtl-optimization/97313 * gcc.target/i386/pr97313.c: New. --- diff --git a/gcc/lra-constraints.c b/gcc/lra-constraints.c index 301c912cb21..f761d7dfe3c 100644 --- a/gcc/lra-constraints.c +++ b/gcc/lra-constraints.c @@ -1132,8 +1132,13 @@ match_reload (signed char out, signed char *ins, signed char *outs, narrow_reload_pseudo_class (out_rtx, goal_class); if (find_reg_note (curr_insn, REG_UNUSED, out_rtx) == NULL_RTX) { + reg = SUBREG_P (out_rtx) ? SUBREG_REG (out_rtx) : out_rtx; start_sequence (); - if (out >= 0 && curr_static_id->operand[out].strict_low) + /* If we had strict_low_part, use it also in reload to keep other + parts unchanged but do it only for regs as strict_low_part + has no sense for memory and probably there is no insn pattern + to match the reload insn in memory case. */ + if (out >= 0 && curr_static_id->operand[out].strict_low && REG_P (reg)) out_rtx = gen_rtx_STRICT_LOW_PART (VOIDmode, out_rtx); lra_emit_move (out_rtx, copy_rtx (new_out_reg)); emit_insn (*after); diff --git a/gcc/testsuite/gcc.target/i386/pr97313.c b/gcc/testsuite/gcc.target/i386/pr97313.c new file mode 100644 index 00000000000..ef93cf1cca8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr97313.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -fPIE" } */ + +typedef struct { + int unspecified : 1; + int secure : 1; +} MemTxAttrs; + +enum { MSCAllowNonSecure } tz_msc_read_pdata; + +int tz_msc_read_s_0; +int tz_msc_check(); +int address_space_ldl_le(); + +void tz_msc_read(MemTxAttrs attrs) { + int as = tz_msc_read_s_0; + long long data; + switch (tz_msc_check()) { + case MSCAllowNonSecure: + attrs.secure = attrs.unspecified = 0; + data = address_space_ldl_le(as, attrs); + } + tz_msc_read_pdata = data; +}