From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sun, 8 Apr 2018 12:25:41 +0000 (+0100)
Subject: add exceptions
X-Git-Tag: convert-csv-opcode-to-binary~5721
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=bb6010b2a993740cbc5eb986e3ff6fd70aa719b2;p=libreriscv.git

add exceptions
---

diff --git a/simple_v_extension.mdwn b/simple_v_extension.mdwn
index 9111087d7..634d205e9 100644
--- a/simple_v_extension.mdwn
+++ b/simple_v_extension.mdwn
@@ -694,6 +694,13 @@ translates effectively to:
 | RSUB8 rt, ra, rb   | Signed Halving sub        | |
 | URSUB8 rt, ra, rb  | Unsigned Halving sub      | |
 
+# Exceptions
+
+> What does an ADD of two different-sized vectors do in simple-V?
+
+* if the two source operands are not the same, throw an exception.
+* if the destination operand is also a vector, and the source is longer
+  than the destination, throw an exception.
 
 # Impementing V on top of Simple-V