From: Ali Saidi <saidi@eecs.umich.edu>
Date: Wed, 16 Aug 2006 19:15:57 +0000 (-0400)
Subject: Add ppls contributions from looking at Authors header... Probably missed stuff so... 
X-Git-Tag: m5_2.0_beta1~21
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=bb6af8eb8ad870138030c617f27a1f4193341e8e;p=gem5.git

Add ppls contributions from looking at Authors header... Probably missed stuff so look it over.

Merge zizzer:/bk/newmem
into  zeep.pool:/z/saidi/tmp/m5.newmem

AUTHORS:
    merge kevin's changes in

--HG--
extra : convert_revision : 86344b6d89d90ec7002584d48736e29a9a3c72e5
---

bb6af8eb8ad870138030c617f27a1f4193341e8e
diff --cc AUTHORS
index eebe40c93,7fc9de54a..249a0c9ff
--- a/AUTHORS
+++ b/AUTHORS
@@@ -1,43 -1,88 +1,89 @@@
- Steven K. Reinhardt
- -----------------------
 +
  Nathan L. Binkert
  -----------------------
+ * Alpha full system support
+ * Statistics package
+ * Event queue
+ * Pseudo instructions
 -* Remote GDB facilities 
++* Remote GDB facilities
+ * PC sampling
+ * Trace facilities
+ * Tru64 support
+ * Ethernet (Link, NSGIGE, Sinic) device support
+ * PCI device support
  
- Erik G. Hallnor
+ Steven K. Reinhardt
  -----------------------
+ * Alpha support
+ * ISA parsing
+ * SWIG intergration
+ * New memory system
+ * Simple CPU
+ * Instruction tracing
+ * PC sampling
+ * Deprecated detailed CPU
+ * Binary Loading
  
- Steve E. Raasch
+ Ali G. Saidi
  -----------------------
+ * Alpha Linux support
+ * Alpha (Tsunami) platform and devices
+ * I/O <-> memory interface
+ * PCI device interface
+ * Multiple ISA support
 -* Memory bridge, bus, packet, port interfaces 
++* Memory bridge, bus, packet, port interfaces
+ * SPARC IPRs
  
- Lisa R. Hsu
+ Kevin T. Lim
  -----------------------
- DP83820 NIC device model
+ * New CPU model
++* CPU checker
+ * CPU class restructuring
 -* Quiecsing/Draining 
++* Quiecsing/Draining
  
+ Ronald G. Dreslinski Jr
+ -----------------------
+ * Caches/Cache coherence
+ * Prefetching
+ * New memory system (port, request, packet, cache porting)
  
- Ali G. Saidi
+ Lisa R. Hsu
  -----------------------
+ * DP83820 NIC device model
+ * Kernel stats stuff
+ * Linux Dist disk image building
  
- Andrew L. Schultz
+ Gabriel Black
  -----------------------
+ * Multiple ISA support
+ * Alpha support reorgization
 -* SPARC ISA
++* SPARC SE support
  
- Kevin T. Lim
+ Korey L. Sewell
  -----------------------
- O3CPU model, CPU checker, revisions to CPU interfaces, transitioning some functionality and configurations over to Python.
 -* New CPU SMT support
++* O3CPU SMT support
+ * MIPS support
  
- Ronald G. Dreslinski Jr
+ Andrew L. Schultz
  -----------------------
+ * IDE controller/disk model
+ * PCI devices interface
+ * Linux Dist disk image building
  
- Gabriel Black
+ Erik G. Hallnor
  -----------------------
- SPARC ISA
+ * Caches
+ * Trace reader support
  
- Korey L. Sewell
+ Steve E. Raasch
  -----------------------
- MIPS ISA / O3CPU SMT Support
+ * Deprecated CPU model
+ * Generic CPU structures
  
 -
  David Green
  -----------------------
+ * Deprecated CPU model
+ * Caches
  
  Benjamin S. Nash
  -----------------------