From: lkcl <lkcl@web>
Date: Thu, 28 Jul 2022 00:42:11 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~994
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=bb7470f6c9ae8a91d8f9df6c26201b2721958d33;p=libreriscv.git

---

diff --git a/nlnet_2022_librebmc.mdwn b/nlnet_2022_librebmc.mdwn
index fcda48dca..9369d8ae0 100644
--- a/nlnet_2022_librebmc.mdwn
+++ b/nlnet_2022_librebmc.mdwn
@@ -61,12 +61,18 @@ EUR 75,000.
 * Design and fabrication of Libre/Open Hardware Dual FPGA Carrier
   boards (most likely accepting OrangeCrab as a module)
 * Porting of both LibreBMC and OpenBMC to the FPGA Board
+* Porting to Raptor Engineering's Arctic Tern Board
 * Implementation of *server* side LPC (client-side already exists)
 * Verilator simulation of both client and server side LPC
   and testing of the two simulations back-to-back
+* Development of an EU Standard for Baseboard Management Control,
+  suitable for EU end-user products such as chromebooks, laptops,
+  and desktop computers (instead of the current soldered-down
+  insecure ICs).
 
 # Compare your own project with existing or historical efforts.
 
+TODO compare with RunBMC and OpenBMC.
 
 ## What are significant technical challenges you expect to solve during the project, if any?