From: lkcl <lkcl@web>
Date: Fri, 8 Jul 2022 12:48:55 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~1270
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=bb90d89c1896de9d5b455d94988b8a9090f328c5;p=libreriscv.git

---

diff --git a/openpower/atomics.mdwn b/openpower/atomics.mdwn
index 53e4fb8a8..e8cc340e4 100644
--- a/openpower/atomics.mdwn
+++ b/openpower/atomics.mdwn
@@ -12,7 +12,8 @@ of the order of 10^5 or greater SMP atomic locks per second.
 
 Implementations have a hard time recognizing existing atomic operations
 via macro-op fusion because they would often have to detect and fuse a
-large number of instructions, including branches.
+large number of instructions, including branches. This is contrary
+to the RISC paradigm.
 
 There is also the issue that PowerISA's memory fences are unnecessarily
 strong, particularly `isync` which is used for a lot of `acquire` and