From: Florent Kermarrec Date: Thu, 22 Jan 2015 15:52:26 +0000 (+0100) Subject: targets/core: simplify ios generation X-Git-Tag: 24jan2021_ls180~2572^2~24 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=bbd2a076becdce070b28936a5830659637894732;p=litex.git targets/core: simplify ios generation --- diff --git a/targets/core.py b/targets/core.py index b876e243..55085c33 100644 --- a/targets/core.py +++ b/targets/core.py @@ -39,15 +39,10 @@ class LiteSATACore(Module): else: yield e - sink_layout = command_tx_description(32).get_full_layout() - source_layout = command_rx_description(32).get_full_layout() - for port in self.user_ports: - for e in _iter_layout(sink_layout): - obj = getattr(port.sink, e[0]) - ios = ios.union({obj}) - for e in _iter_layout(source_layout): - obj = getattr(port.source, e[0]) + for endpoint in [port.sink, port.source]: + for e in _iter_layout(endpoint.layout): + obj = getattr(endpoint, e[0]) ios = ios.union({obj}) return ios