From: Carl Love Date: Mon, 19 Feb 2018 17:27:39 +0000 (+0000) Subject: rs6000-builtin.def: Change NEG macro expansions from BU_ALTIVEC_A to BU_P8V_AV_1... X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=bbe57e1e55ec6c97fce0f5e9e6ce1dacf4cc0d34;p=gcc.git rs6000-builtin.def: Change NEG macro expansions from BU_ALTIVEC_A to BU_P8V_AV_1 and... gcc/ChangeLog: 2018-02-19 Carl Love * config/rs6000/rs6000-builtin.def: Change NEG macro expansions from BU_ALTIVEC_A to BU_P8V_AV_1 and BU_ALTIVEC_OVERLOAD_1 to BU_P8V_OVERLOAD_1. * config/rs6000/rs6000-c.c: Change ALTIVEC_BUILTIN_VEC_NEG to P8V_BUILTIN_VEC_NEG. gcc/testsuite/ChangeLog: 2018-02-19 Carl Love * gcc.target/powerpc/fold-vec-neg-int.p7.c: Remove test file. From-SVN: r257812 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index eac7dfbf8e9..6b5972278f3 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2018-02-19 Carl Love + + * config/rs6000/rs6000-builtin.def: Change NEG macro expansions from + BU_ALTIVEC_A to BU_P8V_AV_1 and BU_ALTIVEC_OVERLOAD_1 to + BU_P8V_OVERLOAD_1. + * config/rs6000/rs6000-c.c: Change ALTIVEC_BUILTIN_VEC_NEG to + P8V_BUILTIN_VEC_NEG. + 2018-02-19 Sebastian Perta * config/rl78/rl78.md (movdf): New define expand. diff --git a/gcc/config/rs6000/rs6000-builtin.def b/gcc/config/rs6000/rs6000-builtin.def index 3ffad948f7d..876b1d99ec7 100644 --- a/gcc/config/rs6000/rs6000-builtin.def +++ b/gcc/config/rs6000/rs6000-builtin.def @@ -1162,14 +1162,6 @@ BU_ALTIVEC_A (NABS_V16QI, "nabs_v16qi", CONST, nabsv16qi2) BU_ALTIVEC_A (NABS_V4SF, "nabs_v4sf", CONST, vsx_nabsv4sf2) BU_ALTIVEC_A (NABS_V2DF, "nabs_v2df", CONST, vsx_nabsv2df2) -/* Altivec NEG functions. */ -BU_ALTIVEC_A (NEG_V2DI, "neg_v2di", CONST, negv2di2) -BU_ALTIVEC_A (NEG_V4SI, "neg_v4si", CONST, negv4si2) -BU_ALTIVEC_A (NEG_V8HI, "neg_v8hi", CONST, negv8hi2) -BU_ALTIVEC_A (NEG_V16QI, "neg_v16qi", CONST, negv16qi2) -BU_ALTIVEC_A (NEG_V4SF, "neg_v4sf", CONST, negv4sf2) -BU_ALTIVEC_A (NEG_V2DF, "neg_v2df", CONST, negv2df2) - /* 1 argument Altivec builtin functions. */ BU_ALTIVEC_1 (VEXPTEFP, "vexptefp", FP, altivec_vexptefp) BU_ALTIVEC_1 (VLOGEFP, "vlogefp", FP, altivec_vlogefp) @@ -1469,7 +1461,6 @@ BU_ALTIVEC_OVERLOAD_1 (FLOOR, "floor") BU_ALTIVEC_OVERLOAD_1 (LOGE, "loge") BU_ALTIVEC_OVERLOAD_1 (MTVSCR, "mtvscr") BU_ALTIVEC_OVERLOAD_1 (NEARBYINT, "nearbyint") -BU_ALTIVEC_OVERLOAD_1 (NEG, "neg") BU_ALTIVEC_OVERLOAD_1 (RE, "re") BU_ALTIVEC_OVERLOAD_1 (RINT, "rint") BU_ALTIVEC_OVERLOAD_1 (ROUND, "round") @@ -1913,6 +1904,15 @@ BU_P8V_VSX_1 (REVB_V16QI, "revb_v16qi", CONST, revb_v16qi) BU_P8V_VSX_1 (REVB_V2DF, "revb_v2df", CONST, revb_v2df) BU_P8V_VSX_1 (REVB_V4SF, "revb_v4sf", CONST, revb_v4sf) +/* Power 8 Altivec NEG functions. */ +BU_P8V_AV_1 (NEG_V2DI, "neg_v2di", CONST, negv2di2) +BU_P8V_AV_1 (NEG_V4SI, "neg_v4si", CONST, negv4si2) +BU_P8V_AV_1 (NEG_V8HI, "neg_v8hi", CONST, negv8hi2) +BU_P8V_AV_1 (NEG_V16QI, "neg_v16qi", CONST, negv16qi2) +BU_P8V_AV_1 (NEG_V4SF, "neg_v4sf", CONST, negv4sf2) +BU_P8V_AV_1 (NEG_V2DF, "neg_v2df", CONST, negv2df2) + + /* 2 argument VSX instructions added in ISA 2.07. */ BU_P8V_VSX_2 (FLOAT2_V2DF, "float2_v2df", CONST, float2_v2df) BU_P8V_VSX_2 (FLOAT2_V2DI, "float2_v2di", CONST, float2_v2di) @@ -2033,6 +2033,7 @@ BU_P8V_OVERLOAD_1 (VPOPCNTUW, "vpopcntuw") BU_P8V_OVERLOAD_1 (VPOPCNTUD, "vpopcntud") BU_P8V_OVERLOAD_1 (VGBBD, "vgbbd") BU_P8V_OVERLOAD_1 (REVB, "revb") +BU_P8V_OVERLOAD_1 (NEG, "neg") /* ISA 2.07 vector overloaded 2 argument functions. */ BU_P8V_OVERLOAD_2 (EQV, "eqv") diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c index 4b6bf5325bd..6e4a2697be3 100644 --- a/gcc/config/rs6000/rs6000-c.c +++ b/gcc/config/rs6000/rs6000-c.c @@ -2291,19 +2291,6 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = { { ALTIVEC_BUILTIN_VEC_NEARBYINT, VSX_BUILTIN_XVRSPI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_NEG, ALTIVEC_BUILTIN_NEG_V16QI, - RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_NEG, ALTIVEC_BUILTIN_NEG_V8HI, - RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_NEG, ALTIVEC_BUILTIN_NEG_V4SI, - RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_NEG, ALTIVEC_BUILTIN_NEG_V2DI, - RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_NEG, ALTIVEC_BUILTIN_NEG_V4SF, - RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_NEG, ALTIVEC_BUILTIN_NEG_V2DF, - RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, - { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR, RS6000_BTI_V4SF, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, { ALTIVEC_BUILTIN_VEC_NOR, ALTIVEC_BUILTIN_VNOR, @@ -2429,6 +2416,19 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = { { ALTIVEC_BUILTIN_VEC_PACK, P8V_BUILTIN_VPKUDUM, RS6000_BTI_V4SF, RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0 }, + { P8V_BUILTIN_VEC_NEG, P8V_BUILTIN_NEG_V16QI, + RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 }, + { P8V_BUILTIN_VEC_NEG, P8V_BUILTIN_NEG_V8HI, + RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 }, + { P8V_BUILTIN_VEC_NEG, P8V_BUILTIN_NEG_V4SI, + RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 }, + { P8V_BUILTIN_VEC_NEG, P8V_BUILTIN_NEG_V2DI, + RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 }, + { P8V_BUILTIN_VEC_NEG, P8V_BUILTIN_NEG_V4SF, + RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 }, + { P8V_BUILTIN_VEC_NEG, P8V_BUILTIN_NEG_V2DF, + RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 }, + { P9V_BUILTIN_VEC_CONVERT_4F32_8I16, P9V_BUILTIN_CONVERT_4F32_8I16, RS6000_BTI_unsigned_V8HI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 }, diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 9766970dc04..6adc78e9601 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2018-02-19 Carl Love + + * gcc.target/powerpc/fold-vec-neg-int.p7.c: Remove test file. + 2018-01-16 Sebastian Peryt PR target/84460