From: rwilbur <rwilbur@web>
Date: Tue, 16 Mar 2021 21:17:19 +0000 (+0000)
Subject: (no commit message)
X-Git-Tag: convert-csv-opcode-to-binary~9
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=bbf41390deb9bad956bbe7fb65c1c0342143849f;p=libreriscv.git

---

diff --git a/rwilbur.mdwn b/rwilbur.mdwn
index 3e429fadc..19fa56ed0 100644
--- a/rwilbur.mdwn
+++ b/rwilbur.mdwn
@@ -4,16 +4,18 @@ Libre enthusiast, mathematician, physicist, electrical engineer, and computer sc
 
 # Status
 
-## Working on ...
+## Currently
 
-### Multiplication
+Working on the following efforts:
+
+* Multiplication
 
 Working on the [[multiplication|/3d_gpu/architecture/dynamic_simd/mul]] wiki page to document ideas for multiplication algorithms and implementation.
 
-### Bug 602
+* Bug 602
 
-Working on [Bug 602 - low performance bare minimum functionality SIMD emulator required][bug 602] pulling pseudocode out of documentation to make a VSX implementation in software.
+Working on [Bug 602 - low performance bare minimum functionality SIMD emulator required][bug 602] pulling pseudocode out of documentation to make a VSX implementation in software.  Based on the ISA spec. v3.0B:
 
-##### First section:  pp. 246 to 252, vector pack/unpack
+1.  pp. 246 to 252, vector pack/unpack
 
 [bug 602]:  https://bugs.libre-soc.org/show_bug.cgi?id=602