From: Yunsup Lee <yunsup@cs.berkeley.edu>
Date: Tue, 17 Mar 2015 11:33:17 +0000 (-0700)
Subject: bugfix, mbadaddr should be writable
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=bc5b666397b9dc3abd0012d31db061181062946e;p=riscv-isa-sim.git

bugfix, mbadaddr should be writable
---

diff --git a/riscv/processor.cc b/riscv/processor.cc
index 335cbea..c2d5275 100644
--- a/riscv/processor.cc
+++ b/riscv/processor.cc
@@ -398,6 +398,7 @@ void processor_t::set_csr(int which, reg_t val)
     case CSR_MEPC: state.mepc = val; break;
     case CSR_MSCRATCH: state.mscratch = val; break;
     case CSR_MCAUSE: state.mcause = val; break;
+    case CSR_MBADADDR: state.mbadaddr = val; break;
     case CSR_SEND_IPI: sim->send_ipi(val); break;
     case CSR_TOHOST:
       if (state.tohost == 0)