From: lkcl Date: Tue, 19 Dec 2023 17:31:22 +0000 (+0000) Subject: (no commit message) X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=bc87cc7f52df0337fe550f1dc75642270afec185;p=libreriscv.git --- diff --git a/meetings/sync_up/sync_up_2023-12-19.mdwn b/meetings/sync_up/sync_up_2023-12-19.mdwn index 7162a886f..c91d8d140 100644 --- a/meetings/sync_up/sync_up_2023-12-19.mdwn +++ b/meetings/sync_up/sync_up_2023-12-19.mdwn @@ -79,8 +79,6 @@ Other: - Document RfP submission process, currently under this bug. Link to new documentation page [[HDL_workflow/rfp_submission_guide/]] -# --- TODO below here --- - # Sadoon - Work together with Shriya (with Luke's asssitance) on Poly1305/ED25519. @@ -88,17 +86,6 @@ Other: Poly1305 work.** - Probably won't have enough time to do ed25519 before FOSDEM. -# Dmitry - -* Update [bug #1126](https://bugs.libre-soc.org/show_bug.cgi?id=1126) -to include git commit descriptions. -* Check whether RISC-V have their own way of describing the instructions - (likely they do). -* Familiarise yourself with -[svanalysis.py](https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=src/openpower/sv/sv_analysis.py;h=21778ad02d78c4f7ef5b6df93e096f4abbe365ad;hb=HEAD), -as we will need a similar tool for RISC-V. -* Check what RISC-V support in binutils looks like. *Needed for confirming -the details of the RISC-V binutils grant*. [[!tag meeting2023]]