From: Andrew Waterman <waterman@cs.berkeley.edu>
Date: Tue, 21 Apr 2015 21:57:42 +0000 (-0700)
Subject: Fix benchmark compilation/execution on RV32
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=bcf83a88846468dcb294e2646270f433d967cf26;p=riscv-tests.git

Fix benchmark compilation/execution on RV32
---

diff --git a/benchmarks/Makefile b/benchmarks/Makefile
index 23ce02d..3cb899a 100644
--- a/benchmarks/Makefile
+++ b/benchmarks/Makefile
@@ -55,7 +55,7 @@ RISCV_GCC = $(RISCV_PREFIX)gcc
 RISCV_GCC_OPTS = -static -Wa,-march=RVIMAFDXhwacha -std=gnu99 -O2 -ffast-math
 RISCV_LINK = $(RISCV_GCC) -T $(bmarkdir)/common/test.ld $(incs)
 RISCV_LINK_MT = $(RISCV_GCC) -T $(bmarkdir)/common/test-mt.ld
-RISCV_LINK_OPTS = -nostdlib -nostartfiles -ffast-math -lc
+RISCV_LINK_OPTS = -nostdlib -nostartfiles -ffast-math -lc -lgcc
 RISCV_OBJDUMP = $(RISCV_PREFIX)objdump --disassemble-all --disassemble-zeroes --section=.text --section=.text.startup --section=.data
 RISCV_SIM = spike
 
diff --git a/benchmarks/common/syscalls.c b/benchmarks/common/syscalls.c
index b1c100d..4c494f1 100644
--- a/benchmarks/common/syscalls.c
+++ b/benchmarks/common/syscalls.c
@@ -66,7 +66,7 @@ static void tohost_exit(int code)
   while (1);
 }
 
-long handle_trap(long cause, long epc, long regs[32])
+long handle_trap(long cause, long epc, long long regs[32])
 {
   int* csr_insn;
   asm ("jal %0, 1f; csrr a0, stats; 1:" : "=r"(csr_insn));