From: Cesar Strauss <cestrauss@gmail.com>
Date: Mon, 22 Feb 2021 21:29:11 +0000 (-0300)
Subject: Fix typo when calculating PowerDecoder2.no_out_vec
X-Git-Tag: convert-csv-opcode-to-binary~166
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=bcfa24db4754e0a60fe7ec11ab48ce8a92fdfe35;p=soc.git

Fix typo when calculating PowerDecoder2.no_out_vec
---

diff --git a/src/soc/decoder/power_decoder2.py b/src/soc/decoder/power_decoder2.py
index 8a6ef221..30e78faa 100644
--- a/src/soc/decoder/power_decoder2.py
+++ b/src/soc/decoder/power_decoder2.py
@@ -1181,7 +1181,7 @@ class PowerDecode2(PowerDecodeSubset):
         comb += self.o2_isvec.eq(o2_svdec.isvec)
         # TODO: include SPRs and CRs here!  must be True when *all* are scalar
         comb += self.no_out_vec.eq((~o2_svdec.isvec) & (~o_svdec.isvec) &
-                                   (crout_svdec.isvec))
+                                   (~crout_svdec.isvec))
 
         # SPRs out
         comb += e.read_spr1.eq(dec_a.spr_out)