From: Mike Frysinger Date: Sat, 1 May 2021 19:58:09 +0000 (-0400) Subject: sim: riscv: fix building on 32-bit hosts w/out int128 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=bd12755bf409cb931682a13f08e41d87fac84ab5;p=binutils-gdb.git sim: riscv: fix building on 32-bit hosts w/out int128 Check for __SIZEOF_INT128__ before trying to use the builtin type. This fixes building on some 32-bit systems like x86. --- diff --git a/sim/riscv/ChangeLog b/sim/riscv/ChangeLog index 37284a982a9..367faac9d4e 100644 --- a/sim/riscv/ChangeLog +++ b/sim/riscv/ChangeLog @@ -1,3 +1,7 @@ +2021-05-01 Mike Frysinger + + * sim-main.c (mulhu): Check if __SIZEOF_INT128__ is defined. + 2021-04-26 Mike Frysinger * sim-main.c (MAX, MIN): Delete. diff --git a/sim/riscv/sim-main.c b/sim/riscv/sim-main.c index a80dc683826..6a2904cced7 100644 --- a/sim/riscv/sim-main.c +++ b/sim/riscv/sim-main.c @@ -603,7 +603,7 @@ execute_i (SIM_CPU *cpu, unsigned_word iw, const struct riscv_opcode *op) static unsigned64 mulhu (unsigned64 a, unsigned64 b) { -#ifdef __GNUC__ +#if defined(__GNUC__) && defined(__SIZEOF_INT128__) return ((__int128)a * b) >> 64; #else uint64_t t;