From: Clifford Wolf Date: Sun, 27 Oct 2013 08:30:58 +0000 (+0100) Subject: Added design->full_selection() helper method X-Git-Tag: yosys-0.2.0~439 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=bd2c8ec886cc34eac22493620de74b86b7f3628d;p=yosys.git Added design->full_selection() helper method --- diff --git a/kernel/rtlil.h b/kernel/rtlil.h index 9fae954c1..6cb471b58 100644 --- a/kernel/rtlil.h +++ b/kernel/rtlil.h @@ -219,6 +219,9 @@ struct RTLIL::Design { bool selected_module(RTLIL::IdString mod_name) const; bool selected_whole_module(RTLIL::IdString mod_name) const; bool selected_member(RTLIL::IdString mod_name, RTLIL::IdString memb_name) const; + bool full_selection() const { + return selection_stack.back().full_selection; + } template bool selected(T1 *module) const { return selected_module(module->name); }