From: lkcl <lkcl@web>
Date: Thu, 8 Sep 2022 11:20:38 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~640
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=bd77a2319de185aa0f5098de51e00482ce39cfac;p=libreriscv.git

---

diff --git a/openpower/sv/compliancy_levels.mdwn b/openpower/sv/compliancy_levels.mdwn
index 06166d596..323c6c105 100644
--- a/openpower/sv/compliancy_levels.mdwn
+++ b/openpower/sv/compliancy_levels.mdwn
@@ -37,9 +37,11 @@ Summary of Compliancy Levels, each Level includes all lower levels:
   in both Horizontal-First and Vertical-First Mode as well as Predication
   (Single and Twin) for the GPRs r3, r10 and r30.  CR-Field-based
   Predicates, if used, may still raise illegal instruction trap.
-* **DSP/AV**: 128 registers,
+* **Embedded DSP/AV**: 128 registers,
    element-width
   overrides, and Saturation and Mapreduce/Iteration Modes.
+* **High-end DSP/AV**: Same as Embedded-DSP/AV except also
+  including Indexed and Offset REMAP capability.
 * **3D/Advanced/Supercomputing**:  all SV Branch instructions;
   crweird and vector-assist instructions (`set-before-first` etc);
   Swizzle Move instructions;