From: Eddie Hung <eddie@fpgeh.com>
Date: Fri, 21 Jun 2019 19:46:55 +0000 (-0700)
Subject: No point logging constant bit
X-Git-Tag: working-ls180~1237^2~66
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=bd7ec673dd5b542031698074e1043dcc32af2168;p=yosys.git

No point logging constant bit
---

diff --git a/backends/aiger/xaiger.cc b/backends/aiger/xaiger.cc
index aa10aa55e..6718e4f2c 100644
--- a/backends/aiger/xaiger.cc
+++ b/backends/aiger/xaiger.cc
@@ -110,7 +110,7 @@ struct XAigerWriter
 		}
 
 		if (bit == State::Sx || bit == State::Sz) {
-			log_debug("Bit '%s' contains 'x' or 'z' bits. Treating as 1'b0.\n", log_signal(bit));
+			log_debug("Design contains 'x' or 'z' bits. Treating as 1'b0.\n");
 			a = aig_map.at(State::S0);
 		}