From: lkcl <lkcl@web>
Date: Thu, 7 Jan 2021 16:52:33 +0000 (+0000)
Subject: (no commit message)
X-Git-Tag: convert-csv-opcode-to-binary~578
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=bd947487bb6a497704e245c45f6f4ceb3217edaf;p=libreriscv.git

---

diff --git a/openpower/sv/setvl.mdwn b/openpower/sv/setvl.mdwn
index 74cd189c0..c0f5493f5 100644
--- a/openpower/sv/setvl.mdwn
+++ b/openpower/sv/setvl.mdwn
@@ -53,6 +53,8 @@ Note that setmvli is a pseudo-op, based on RA/RT=0, and setvli likewise
     setvli VL=8    : setvl r5, r0, VL=8
     setmvli MVL=8  : setvl r0, r0, MVL=8
 
+Note that whilst it is possible to set both MVL and VL from the same immediate, it is not possible to set them to different immediates in the same instruction.  That would require two instructions. 
+
 # Pseudocode
 
     // instruction fields: