From: Andrew Waterman Date: Sat, 27 Jul 2013 00:44:11 +0000 (-0700) Subject: Rename MFTX/MXTF to FMV X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=bda232b0117adbc949b87ffb71fda34e51c891bc;p=riscv-isa-sim.git Rename MFTX/MXTF to FMV --- diff --git a/riscv/disasm.cc b/riscv/disasm.cc index 86b70e0..570ed65 100644 --- a/riscv/disasm.cc +++ b/riscv/disasm.cc @@ -584,12 +584,12 @@ disassembler::disassembler() DEFINE_XFTYPE(fcvt_s_w); DEFINE_XFTYPE(fcvt_s_wu); DEFINE_XFTYPE(fcvt_s_wu); - DEFINE_XFTYPE(mxtf_s); + DEFINE_XFTYPE(fmv_s_x); DEFINE_FXTYPE(fcvt_l_s); DEFINE_FXTYPE(fcvt_lu_s); DEFINE_FXTYPE(fcvt_w_s); DEFINE_FXTYPE(fcvt_wu_s); - DEFINE_FXTYPE(mftx_s); + DEFINE_FXTYPE(fmv_x_s); DEFINE_FXTYPE(feq_s); DEFINE_FXTYPE(flt_s); DEFINE_FXTYPE(fle_s); @@ -614,12 +614,12 @@ disassembler::disassembler() DEFINE_XFTYPE(fcvt_d_w); DEFINE_XFTYPE(fcvt_d_wu); DEFINE_XFTYPE(fcvt_d_wu); - DEFINE_XFTYPE(mxtf_d); + DEFINE_XFTYPE(fmv_d_x); DEFINE_FXTYPE(fcvt_l_d); DEFINE_FXTYPE(fcvt_lu_d); DEFINE_FXTYPE(fcvt_w_d); DEFINE_FXTYPE(fcvt_wu_d); - DEFINE_FXTYPE(mftx_d); + DEFINE_FXTYPE(fmv_x_d); DEFINE_FXTYPE(feq_d); DEFINE_FXTYPE(flt_d); DEFINE_FXTYPE(fle_d); diff --git a/riscv/insns/fmv_d_x.h b/riscv/insns/fmv_d_x.h new file mode 100644 index 0000000..29792ec --- /dev/null +++ b/riscv/insns/fmv_d_x.h @@ -0,0 +1,3 @@ +require_xpr64; +require_fp; +FRD = RS1; diff --git a/riscv/insns/fmv_s_x.h b/riscv/insns/fmv_s_x.h new file mode 100644 index 0000000..54546ea --- /dev/null +++ b/riscv/insns/fmv_s_x.h @@ -0,0 +1,2 @@ +require_fp; +FRD = RS1; diff --git a/riscv/insns/fmv_x_d.h b/riscv/insns/fmv_x_d.h new file mode 100644 index 0000000..a067fd9 --- /dev/null +++ b/riscv/insns/fmv_x_d.h @@ -0,0 +1,3 @@ +require_xpr64; +require_fp; +RD = FRS1; diff --git a/riscv/insns/fmv_x_s.h b/riscv/insns/fmv_x_s.h new file mode 100644 index 0000000..d3d59b2 --- /dev/null +++ b/riscv/insns/fmv_x_s.h @@ -0,0 +1,2 @@ +require_fp; +RD = sext32(FRS1); diff --git a/riscv/insns/mftx_d.h b/riscv/insns/mftx_d.h deleted file mode 100644 index a067fd9..0000000 --- a/riscv/insns/mftx_d.h +++ /dev/null @@ -1,3 +0,0 @@ -require_xpr64; -require_fp; -RD = FRS1; diff --git a/riscv/insns/mftx_s.h b/riscv/insns/mftx_s.h deleted file mode 100644 index d3d59b2..0000000 --- a/riscv/insns/mftx_s.h +++ /dev/null @@ -1,2 +0,0 @@ -require_fp; -RD = sext32(FRS1); diff --git a/riscv/insns/mxtf_d.h b/riscv/insns/mxtf_d.h deleted file mode 100644 index 29792ec..0000000 --- a/riscv/insns/mxtf_d.h +++ /dev/null @@ -1,3 +0,0 @@ -require_xpr64; -require_fp; -FRD = RS1; diff --git a/riscv/insns/mxtf_s.h b/riscv/insns/mxtf_s.h deleted file mode 100644 index 54546ea..0000000 --- a/riscv/insns/mxtf_s.h +++ /dev/null @@ -1,2 +0,0 @@ -require_fp; -FRD = RS1; diff --git a/riscv/opcodes.h b/riscv/opcodes.h index 34e10c1..e3fcf16 100644 --- a/riscv/opcodes.h +++ b/riscv/opcodes.h @@ -1,3 +1,4 @@ +DECLARE_INSN(fmv_s_x, 0x1e053, 0x3fffff) DECLARE_INSN(remuw, 0x7bb, 0x1ffff) DECLARE_INSN(fmin_d, 0x180d3, 0x1ffff) DECLARE_INSN(lr_w, 0x1012b, 0x3fffff) @@ -25,14 +26,12 @@ DECLARE_INSN(break, 0xf7, 0xffffffff) DECLARE_INSN(fcvt_s_w, 0xe053, 0x3ff1ff) DECLARE_INSN(mul, 0x433, 0x1ffff) DECLARE_INSN(amominu_d, 0x19ab, 0x1ffff) -DECLARE_INSN(mftx_d, 0x1c0d3, 0x3fffff) DECLARE_INSN(srli, 0x293, 0x3f03ff) DECLARE_INSN(amominu_w, 0x192b, 0x1ffff) DECLARE_INSN(divuw, 0x6bb, 0x1ffff) DECLARE_INSN(mulw, 0x43b, 0x1ffff) DECLARE_INSN(srlw, 0x2bb, 0x1ffff) DECLARE_INSN(div, 0x633, 0x1ffff) -DECLARE_INSN(mftx_s, 0x1c053, 0x3fffff) DECLARE_INSN(j, 0x67, 0x7f) DECLARE_INSN(fence, 0x12f, 0x3ff) DECLARE_INSN(fnmsub_s, 0x4b, 0x1ff) @@ -92,10 +91,12 @@ DECLARE_INSN(fcvt_wu_s, 0xb053, 0x3ff1ff) DECLARE_INSN(rdtime, 0x677, 0x7ffffff) DECLARE_INSN(andi, 0x393, 0x3ff) DECLARE_INSN(clearpcr, 0x7b, 0x3ff) +DECLARE_INSN(fmv_x_s, 0x1c053, 0x3fffff) DECLARE_INSN(fsgnjn_d, 0x60d3, 0x1ffff) DECLARE_INSN(fnmadd_s, 0x4f, 0x1ff) DECLARE_INSN(jal, 0x6f, 0x7f) DECLARE_INSN(lwu, 0x303, 0x3ff) +DECLARE_INSN(fmv_x_d, 0x1c0d3, 0x3fffff) DECLARE_INSN(fnmadd_d, 0xcf, 0x1ff) DECLARE_INSN(amoadd_d, 0x1ab, 0x1ffff) DECLARE_INSN(lr_d, 0x101ab, 0x3fffff) @@ -107,7 +108,6 @@ DECLARE_INSN(amomax_d, 0x15ab, 0x1ffff) DECLARE_INSN(fsd, 0x1a7, 0x3ff) DECLARE_INSN(fcvt_w_d, 0xa0d3, 0x3ff1ff) DECLARE_INSN(slt, 0x133, 0x1ffff) -DECLARE_INSN(mxtf_d, 0x1e0d3, 0x3fffff) DECLARE_INSN(sllw, 0xbb, 0x1ffff) DECLARE_INSN(amoor_d, 0xdab, 0x1ffff) DECLARE_INSN(slti, 0x113, 0x3ff) @@ -119,9 +119,9 @@ DECLARE_INSN(slli, 0x93, 0x3f03ff) DECLARE_INSN(amoor_w, 0xd2b, 0x1ffff) DECLARE_INSN(beq, 0x63, 0x3ff) DECLARE_INSN(fld, 0x187, 0x3ff) -DECLARE_INSN(mxtf_s, 0x1e053, 0x3fffff) DECLARE_INSN(fsub_s, 0x1053, 0x1f1ff) DECLARE_INSN(and, 0x3b3, 0x1ffff) +DECLARE_INSN(fmv_d_x, 0x1e0d3, 0x3fffff) DECLARE_INSN(lbu, 0x203, 0x3ff) DECLARE_INSN(syscall, 0x77, 0xffffffff) DECLARE_INSN(fsgnj_s, 0x5053, 0x1ffff)